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參數(shù)資料
| 型號(hào)： | AD9023 |
| 廠商： | Analog Devices, Inc. |
| 元件分類(lèi)： | ADC |
| 英文描述： | 12-Bit 20 MSPS Monolithic A/D Converter |
| 中文描述： | 12位20 MSPS的單片A/D轉(zhuǎn)換 |
| 文件頁(yè)數(shù)： | 7/8頁(yè) |
| 文件大?。?/td> | 368K |
| 代理商： | AD9023 |
AD9023
REV. A
–7–
THEORY OF OPERATION
Refer to the block diagram. The AD9023 employs a three pass
subranging architecture and digital error correction. This com-
bination of design techniques insures 12-bit accuracy at rela-
tively low power.
Analog input signals are immediately attenuated through a resis-
tor divider and applied directly to the sampling bridge of the
track-and-hold (T/H). The T/H holds whatever analog value is
present when the unit is strobed with an ENCODE command.
The conversion process begins on the rising edge of this pulse,
which should conform to the minimum and maximum pulse
width requirements shown in the specifications. Operation be-
low the recommended encode rate (4 Msps) may result in ex-
cessive droop in the internal T/H devices–leading to large dc
and ac errors.
The held analog value of the first track-and-hold is applied to a
5-bit flash converter and a second T/H. The 5-bit flash con-
verter resolves the most significant bits (MSBs) of the held ana-
log voltage. These 5 bits are reconstructed via a 5-bit DAC and
subtracted from the original T/H output signal to form a residue
signal.
A second T/H holds the amplified residue signal while it is en-
coded with a second 5-bit flash ADC. Again the 5 bits are re-
constructed and subtracted from the second T/H output to form
a residue signal. This residue is amplified and encoded with a 4-
bit flash ADC to provide the 3 least significant bits (LSBs) of
the digital output and one bit of error correction.
Digital Error Correction logic aligns the data from the three
flash converters and presents the result as a 12-bit parallel digi-
tal word. The output stage of the AD9023 is ECL. Output data
may be strobed on the rising edge of the ENCODE command.
AD9023 Noise Performance
High speed, wide bandwidth ADCs such as the AD9023 are op-
timized for dynamic performance over a wide range of analog
input frequencies. However, there are many applications (Imag-
ing, Instrumentation, etc.) where dc precision is also important.
Due to the wide input bandwidth of the AD9023 for a given in-
put voltage, there will be a range of output codes which may oc-
cur. This is caused by unavoidable circuit noise within the
wideband circuits in the ADC. If a dc signal is applied to the
ADC and several thousand outputs are recorded, a distribution
of codes such as that shown in the histogram below may result.
R
x–2
X–3
x+3
x+2
x+1
x
x–1
OUTPUT CODE
ONE STANDARD
DEVIATION = RMS
NOISE LEVEL
Figure 11. Equivalent Input Noise
The correct code appears most of the time, but adjacent codes
also appear with reduced probability. If a normal probability
density curve is fitted to this Gaussian distribution of codes, the
standard deviation will be equal to the equivalent input rms
noise of the ADC. The rms noise may also be approximated by
converting the SNR, as measured by a low frequency FFT, to
an equivalent input noise. This method is accurate only if the
SNR performance is dominated by random thermal noise (the
low frequency SNR without harmonics is the best measure).
Sixty-three dB equates to 1 LSB rms for a 2 V p-p (0.707 V rms)
input signal. The AD9023 has approximately 0.5 LSB of rms
noise or a noise limited SNR of 69 dB, indicating that noise
alone does not limit the SNR performance of the device (quanti-
zation noise and linearity are also major contributors).
This thermal noise may come from several sources. The drive
source impedance should be kept low to minimize resistor ther-
mal noise. Some of the internal ADC noise is generated in the
wideband T/H. Sampling ADCs generally have input band-
widths which exceed the Nyquist frequency of one-half the
sampling rate. (The AD9023 has an input bandwidth of over
100 MHz, even though the sampling rate is limited to 20Msps.)
USING THE AD9023
Layout Information
Preserving the accuracy and dynamic performance of the
AD9023 requires that designers pay special attention to the lay-
out of the printed circuit board.
Analog paths should be kept as short as possible and be properly
terminated to avoid reflections. The analog input connection
should be kept away from digital signals paths; this reduces the
amount of digital switching noise which is capacitively coupled
into the analog section. Digital signal paths should also be kept
short, and run lengths should be matched to avoid propagation
delay mismatch. The AD9023 digital outputs should be buff-
ered or latched close to the device (< 2 cm). This prevents load
transients which may feed back into the device.
In high speed circuits, layout of the ground is critical. A single,
low impedance ground plane on the component side of the
board is recommended. Power supplies should be capacitively
coupled to the ground plane with high quality 0.1
μ
F chip ca-
pacitors to reduce noise in the circuit. All power pins of the
AD9023 should be bypassed individually. The compensation
pin (COMP Pin 17) should be bypassed directly to the –V
S
sup-
ply (Pin 15) as close to the part as possible using a 0.1
μ
F chip
capacitor.
Multilayer boards allow designers to lay out signal traces with-
out interrupting the ground plane, and provide low impedance
ground planes. In systems with dedicated analog and digital
grounds, all grounds for the AD9023 should be connected to
the analog ground plane.
In systems using multilayer boards, dedicated power planes are
recommended to provide low impedance connections for device
power. Sockets limit dynamic performance and are not recom-
mended for use with the AD9023.
Timing
Conversion by the AD9023 is initiated by the rising edge of the
ENCODE clock (Pin 8). All required timing is generated inter-
nal to the ADC. Care should be taken to ensure that the encode
clock to the AD9023 is free from jitter that can degrade dy-
namic performance.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| AD9023/PCB | 制造商:Analog Devices 功能描述: |
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| AD9023AZ | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| ad9023bq | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述: |
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