參數(shù)資料
型號: AD9005B
廠商: Analog Devices, Inc.
英文描述: 12-Bit, 10 MSPS A/D Converter(12位,10MSPS A/D轉(zhuǎn)換器)
中文描述: 12位,10 MSPS的A / D轉(zhuǎn)換(12位,高達10MSPS的A / D轉(zhuǎn)換器)
文件頁數(shù): 6/8頁
文件大?。?/td> 160K
代理商: AD9005B
AD9005B
–6–
REV. 0
APPLICATIONS INFORMATION
The AD9005B is a complete analog-to-digital converter. The
AD9005B uses a subranging A/D architecture enhanced by
hybrid technology. This includes an on-board track-and-hold
amplifier, on-board references, timing circuitry and output
latches.
The analog input of the AD9005B is fed directly into the inter-
nal track-and-hold amplifier, thus eliminating the need for ex-
ternal signal conditioning in many applications. This amplifier
provides low input capacitance and a bipolar (
±
1.024 V) input
range. Normally reverse-biased Schottky diodes on the input
provide overrange protection. If the amplitude, bandwidth or dc
voltage level of the analog input signal calls for external signal
conditioning, it is advisable to use an amplifier with low har-
monic distortion and low noise characteristics. Selecting the
amplifier may be difficult because the performance of the
AD9005B will probably exceed the performance of most com-
mercially available amplifiers. A notable exception is the
AD9617, a wideband low noise current feedback amplifier. It is
important to remember that band limiting the analog input
signal can avoid aliasing during the A/D conversion process.
Timing in the AD9005B is critical, and careful measures must
be taken to support 12-bit accuracy. One simple way to enhance
the performance of the AD9005B is to synchronize the system
clock to a crystal oscillator. This will minimize any clock jitter, a
must for maintaining the spectral purity of analog signals near
Nyquist limits. Because the conversion cycle begins with the
rising edge of the encode signal, a fast, clean, rising edge will
also help to reduce any clock jitter.
When the ENCODE signal of the AD9005B goes HIGH, the
internal track-and-hold enters the hold state; after 65 ns, it
returns to track mode. In applications in which the AD9005B is
slowly or intermittently clocked (i.e., in burst mode), the encode
signal should be returned to a logic LOW state during the idle
periods.
The ENCODE signal pulse width should also be adjusted so it
is in the HIGH (hold) state for a minimum of 25 ns. This en-
sures that the T/H enters the hold mode before the A/D conver-
sion takes place.
The AD9005B has many appealing characteristics for 12-bit
A/D converter applications. Its dynamic performance is state-of-
the art in hybrid technology. Typical applications include radar,
missile guidance, digital oscilloscopes, waveform analyzers,
medical instrumentation, electro-optics, communications and
ESM.
(LSB) D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
8
D
9
D
10
(MSB) D
11
AD9005B
ANALOG IN
45
ENCODE
24
TTL
X-TAL
OSCILLATOR
T/H OUT
A/D IN
4
5
DIGITAL +V
S
10
m
F
+5V
0.1
m
F
21
DIGITAL –V
S
10
m
F
–5.2V
0.1
m
F
31
10
m
F
+5V
ANALOG +V
S
0.1
m
F
3
30
ANALOG –V
S
10
m
F
–5.2V
0.1
m
F
6
42
GND
1 22 23 25 26 32 34 35 37 38 46
20
19
18
17
16
15
14
13
12
11
10
9
DIGITAL
OUTPUT
DATA
ANALOG
SIGNAL
Figure 4. Typical Application
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