參數(shù)資料
型號(hào): AD8842ARZ
廠商: Analog Devices Inc
文件頁數(shù): 13/13頁
文件大?。?/td> 0K
描述: IC DAC 8BIT OCTAL MULT 24-SOIC
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 31
系列: TrimDAC®
設(shè)置時(shí)間: 2.9µs
位數(shù): 8
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 8
電壓電源: 雙 ±
功率耗散(最大): 135mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 24-SOIC
包裝: 管件
輸出數(shù)目和類型: 8 電壓,雙極
采樣率(每秒): 500k
產(chǎn)品目錄頁面: 785 (CN2011-ZH PDF)
AD8842
REV.
–9–
CIRCUIT OPERATION
The AD8842 is a general purpose 8-channel ac or dc signal-
level adjustment device designed to replace potentiometers used
in the three-terminal connection mode. Eight independent
channels of programmable signal level control are available in
this 24-pin package device. The outputs are completely buffered
providing up to 3 mA of output drive-current to drive external
loads. The functional equivalent DAC and amplifier combina-
tion shown in Figure 27 produces four-quadrant multiplication
of the signal inputs applied to VIN times the digital input control
word. In addition the AD8842 provides a 50 kHz full power
bandwidth in each four-quadrant multiplying channel. Operat-
ing from plus and minus 5 V power supplies, analog inputs and
outputs of
±3 V are easily accommodated.
Figure 27. Functional Equivalent Circuit to the AD8842
Results in a 4-Quadrant Multiplying Channel
In order to simplify use with a controlling microprocessor a
PCB space saving three-wire serial data interface was chosen.
This interface can be easily adapted to almost all microcom-
puter and microprocessor systems. A clock (CLK), serial data
input (SDI) and a load (LD) strobe pins make up the three-wire
interface. The 12-bit input data word used to change the value
of the internal DAC registers contains a 4-bit address and 8-bits
of data. Using this word combination any DAC register can be
changed at a given time without disturbing the other channels.
A serial data output SDO pin simplifies cascading multiple
AD8842s without adding address decoder chips to the system.
During system power up a logic low on the preset PR pin forces
all DAC registers to 80H which in turn forces all the buffer am-
plifier outputs to zero volts. This asynchronous input pin PR
can be activated at any time to force the DAC registers to the
half-scale code 80H. This is generally the most convenient place
to start general purpose adjustment procedures.
Achieving 4-Quadrant Multiplying with a Current Conveyor
Amplifier
The traditional current output CMOS digital-to-analog con-
verter requires two amplifiers to perform the current-to-voltage
translation and the half-scale offset to achieve four-quadrant
multiplying capability. The circuit shown in Figure 28 shows
one such traditional connection.
Figure 28. One Traditional Technique to Achieve Four-
Quadrant Multiplying with a Complementary Current
Output DAC
A single new current conveyor amplifier design emulates ampli-
fiers A1 and A2 shown in Figure 28. Figure 29 shows the con-
nection and equations that define this new circuit that achieves
four-quadrant multiplication with only one amplifier.
Figure 29. Current Conveyor Amplifier
Using the equations given in Figure 29 one can calculate the
final output equation as follows:
V
O = –1 –
D
256
×
V
IN
R
× R
–D
256
×
V
IN
R
× R
D
256
–1
V
IN +
D
256
×V
IN
= 2D
256
–1
V
IN
= D
128
–1
V
IN
V
IN
CURRENT CONVEYOR
AMPLIFIER
I
1
I
2
(1- D)
256
D
256
V
REF
R
REF
R
V
OUT
= V
IN
(D/128–1)
V
REF
R
V
OUT X
4
2
0
–4
–2
0
–2
24
V
OUT
Volts
–4
VIN – Volts
VOUT = VIN (D/128 – 1), WHERE D = 0 TO 255
D = FFH
D = C0H
D = 80H
D = 40H
D = 00H
AD8842 INPUT-OUTPUT VOLTAGE RANGE
VDAC
VOUT
VIN
RR
VDAC = D/256 × VIN
VOUT = 2 × VDAC – VIN
= 2 (D/256)
× V
IN – VIN
= (D/128 – 1)
× V
IN
R/2
A1
R
A2
R/2
CURRENT OUT
DAC
REF
GND
I1
I2
VIN
VO
A
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