參數(shù)資料
型號: AD8572AR-REEL
廠商: Analog Devices Inc
文件頁數(shù): 11/24頁
文件大?。?/td> 0K
描述: IC OPAMP CHOPPER R-R DUAL 8SOIC
標準包裝: 2,500
放大器類型: 斷路器(零漂移)
電路數(shù): 2
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 0.4 V/µs
增益帶寬積: 1.5MHz
電流 - 輸入偏壓: 10pA
電壓 - 輸入偏移: 1µV
電流 - 電源: 850µA
電流 - 輸出 / 通道: 30mA
電壓 - 電源,單路/雙路(±): 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 帶卷 (TR)
AD8571/AD8572/AD8574
Rev. E | Page 19 of 24
CAPACITIVE LOAD DRIVE
The AD857x have excellent capacitive load driving capabilities
and can safely drive up to 10 nF from a single 5 V supply.
Although the device is stable, capacitive loading limits the
bandwidth of the amplifier. Capacitive loads also increase the
amount of overshoot and ringing at the output. The RC snubber
network shown in Figure 59 can be used to reduce the capacitive
load ringing and overshoot.
5V
VOUT
VIN
200mV p-p
AD8571/
AD8572/
AD8574
CL
4.7nF
Cx
0.47F
Rx
60
+
01
10
4-
05
9
Figure 59. Snubber Network Configuration for Driving Capacitive Loads
Although the snubber network does not recover the loss of
amplifier bandwidth from the load capacitance, it does allow
the amplifier to drive larger values of capacitance while
maintaining a minimum of overshoot and ringing. Figure 60
shows the output of an AD857x driving a 1 nF capacitor with
and without a snubber network.
10μs
100mV
VS = 5V
CL = 4.7nF
WITHOUT
SNUBBER
WITH
SNUBBER
01
10
4-
0
60
Figure 60. Overshoot and Ringing Are Substantially Reduced Using
a Snubber Network
The optimum value for the resistor and capacitor is a function
of the load capacitance and is best determined empirically
because actual CL includes stray capacitances and can differ
substantially from the nominal capacitive load. Table 5 shows
some snubber network values that can be used as starting points.
Table 5. Snubber Network Values for Driving Capacitive Loads
CL (nF)
Rx (Ω)
Cx
1
200
1 nF
4.7
60
0.47 μF
10
20
10 μF
POWER-UP BEHAVIOR
At power-up, the AD857x settles to a valid output within 5 μs.
Figure 61 shows an oscilloscope photo of the output of the
amplifier along with the power supply voltage. Figure 62 shows
the test circuit. With the amplifier configured for unity gain, the
device takes approximately 5 μs to settle to its final output
voltage, hundreds of microseconds faster than many other
autocorrection amplifiers.
5s
1V
VOUT
V+
0V
BOTTOM TRACE = 2V/DIV
TOP TRACE = 1V/DIV
01
10
4-
0
61
Figure 61. AD857x Output Behavior at Power-Up
100k
VSY = 0V TO 5V
VOUT
0
11
04
-0
62
AD8571/
AD8572/
AD8574
Figure 62. AD857x Test Circuit for Power-Up Time
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