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| 型號： | AD842 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Wideband, High Output Current,Fast Settling Op Amp(寬帶,高輸出電流,快速運(yùn)算放大器) |
| 中文描述： | 寬帶，高輸出電流，快速沉降運(yùn)算放大器（寬帶，高輸出電流，快速運(yùn)算放大器） |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 236K |
| 代理商： | AD842 |
AD842–SPECIFICATIONS
Model
AD842J/JR
1
T yp
AD842K
T yp
AD842S
2
T yp
Conditions
Min
Max
Min
Max
Min
Max
Units
INPUT OFFSET VOLT AGE
3
0.5
1.5
2.5/3
0.3
1.0
1.5
0.5
1.5
3.5
mV
mV
μ
V/
°
C
μ
A
μ
A
μ
A
μ
A
T
MIN
–T
MAX
Offset Drift
14
14
14
INPUT BIAS CURRENT
4.2
8
10
0.4
0.5
3.5
5
6
0.2
0.3
4.2
8
12
0.4
0.6
T
MIN
–T
MAX
Input Offset Current
0.1
0.05
0.1
T
MIN
–T
MAX
Differential Mode
INPUT CHARACT ERIST ICS
Input Resistance
Input Capacitance
100
2.0
100
2.0
100
2.0
k
pF
INPUT VOLT AGE RANGE
Common Mode
Common-Mode Rejection
6
10
86
80
6
10
90
86
6
10
86
80
V
dB
dB
nV/
√
Hz
μ
V rms
V
CM
=
±
10 V
T
MIN
–T
MAX
f = 1 kHz
10 Hz to 10 MHz
V
O
=
±
10 V
R
LOAD
≥
500
T
MIN
–T
MAX
115
115
115
INPUT VOLT AGE NOISE
Wideband Noise
9
28
9
28
9
28
OPEN-LOOP GAIN
40/30
20/15
90
50
25
90
40
20
90
V/mV
V/mV
OUT PUT CHARACT ERIST ICS
Voltage
Current
R
LOAD
≥
500
V
OUT
=
±
10 V
Open Loop
6
10
100
6
10
100
6
10
100
V
mA
5
5
5
FREQUENCY RESPONSE
Gain Bandwidth Product
Full Power Bandwidth
4
V
OUT
= 90 mV
V
O
= 20 V p-p
R
LOAD
≥
500
A
VCL
= –2
A
VCL
= –2
A
VCL
= –2
10 V Step
to 0.1%
to 0.01%
f = 4.4 MHz
f = 4.4 MHz
80
80
80
MHz
4.7
6
10
20
375
4.7
6
10
20
375
4.7
6
10
20
375
MHz
ns
%
V/
μ
s
Rise T ime
5
Overshoot
5
Slew Rate
5
Settling T ime
5
300
300
300
80
100
0.015
0.035
80
100
0.015
0.035
80
100
0.015
0.035
ns
ns
%
Degree
Differential Gain
Differential Phase
POWER SUPPLY
Rated Performance
Operating Range
Quiescent Current
±
15
±
15
±
15
V
V
mA
mA
dB
dB
6
5
6
18
14/16
16/19.5
6
5
6
18
14
16
6
5
6
18
14
19
13/14
13
13
T
MIN
–T
MAX
V
S
=
±
5 V to
±
18 V
T
MIN
–T
MAX
Power Supply Rejection Ratio
86
80
100
90
86
105
86
80
100
T EMPERAT URE RANGE
Rated Performance
6
0
+75
0
+75
–55
+125
°
C
PACK AGE OPT IONS
Plastic (N-14)
Cerdip (Q-14)
SOIC (R-16)
T ape and Reel
AD842JN
AD842JQ
AD842JR-16
AD842JR-16-REEL
AD842JR-16-REEL7
AD842JH
AD842K N
AD842K Q
AD842SQ, AD842SQ/883B
T O-8 (H-12A)
LCC (E-20A)
Chips
AD842K H
AD842SH
AD842SE/883B
AD842SCHIPS
AD842JCHIPS
NOT ES
1
AD842JR specifications differ from those of the AD842JN, JQ and JH due to the thermal characteristics of the SOIC package.
2
Standard Military Drawing available 5962-8964201xx
2A – (SE/883B); X A – (SH/883B); CA – (SQ/883B).
3
Input offset voltage specifications are guaranteed after 5 minutes at T
A
= +25
°
C.
4
Full power bandwidth = slew rate/2
π
V
PEAK
.
5
Refer to Figures 22 and 23.
6
“S” grade T
MIN
–T
MAX
specifications are tested with automatic test equipment at T
A
= –55
°
C and T
A
= +125
°
C.
All min and max specifications are guaranteed. Specifications shown in
boldface
are tested on all production units.
Specifications subject to change without notice.
REV. D
–2–
(@ +25
8
C and
6
15 V dc, unless otherwse noted)
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