參數(shù)資料
型號(hào)： AD8370AREZ-RL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 7/28頁(yè)
文件大?。?/td> 0K
描述： IC AMP VGA DIFF LN 16TSSOP
標(biāo)準(zhǔn)包裝： 1,000
放大器類型： 可變?cè)鲆?br>
電路數(shù)： 1
輸出類型： 差分
轉(zhuǎn)換速率： 5750 V/ns
-3db帶寬： 750MHz
電流 - 輸入偏壓： 400pA
電流 - 電源： 79mA
電壓 - 電源，單路/雙路(±)： 3 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 16-TSSOP（0.173"，4.40mm）裸露焊盤
供應(yīng)商設(shè)備封裝： 16-TSSOP-EP
包裝： 帶卷 (TR)
Data Sheet
AD8370
Rev. B | Page 15 of 28
APPLICATIONS
BASIC CONNECTIONS
Figure 44 shows the minimum connections required for basic
operation of the AD8370. Supply voltages between 3.0 V and
5.5 V are allowed. The supply to the VCCO and VCCI pins
should be decoupled with at least one low inductance, surface-
mount ceramic capacitor of 0.1 μF placed as close as possible to
the device.
AD8370
INHI
IC
OM
VCCI
PWUP
VOCM
VCCO
OC
OM
OPH
I
OPLO
OC
OM
VCCO
LTC
H
CL
CK
DAT
A
IC
OM
IN
LO
67
8
23
5
1
11
10
9
15
14
16
13
12
4
SERIAL CONTROL
INTERFACE
100pF
1nF
0.1
F
100pF
0.1
F
+VS (3.0V TO 5.0V)
FERRITE
BEAD
FERRITE
BEAD
1nF
BALANCED
LOAD
RL
BALANCED
SOURCE
RS
2
RS
2
03692-
042
Figure 44. Basic Connections
The AD8370 is designed to be used in differential signal chains.
Differential signaling allows improved even-order harmonic
cancellation and better common-mode immunity than can be
achieved using a single-ended design. To fully exploit these
benefits, it is necessary to drive and load the device in a
balanced manner. This requires some care to ensure that the
common-mode impedance values presented to each set of
inputs and outputs are balanced. Driving the device with an
unbalanced source can degrade the common-mode rejection
ratio. Loading the device with an unbalanced load can cause
degradation to even-order harmonic distortion and premature
output compression. In general, optimum designs are fully
balanced, although the AD8370 still provides impressive
performance when used in an unbalanced environment.
The AD8370 is a fine adjustment, VGA. The gain control
transfer function is linear in voltage gain. On a decibel scale,
this results in the logarithmic transfer functions shown in
Figure 4. At the low end of the gain transfer function, the slope
is steep, providing a rather coarse control function. At the high
end of the gain control range, the decibel step size decreases,
allowing precise gain adjustment.
GAIN CODES
The AD8370’s two gain ranges are referred to as high gain (HG)
and low gain (LG). Within each range, there are 128 possible
gain codes. Therefore, the minimum gain in the low gain range
is given by the nomenclature LG0 whereas the maximum gain
in that range is given by LG127. The same is true for the high
gain range. Both LG0 and HG0 essentially turn off the variable
transconductance stage, and thus no output is available with
these codes (see Figure 26).
The theoretical linear voltage gain can be expressed with respect
to the gain code as
AV = GainCode Vernier (1 + (PreGain 1) MSB)
where:
AV is the linear voltage gain.
GainCode is the digital gain control word minus the MSB
(the final 7 bits).
Vernier = 0.055744 V/V
PreGain = 7.079458 V/V
MSB is the most significant bit of the 8-bit gain control word.
The MSB sets the device in either high gain mode (MSB = 1)
or low gain mode (MSB = 0).
For example, a gain control word of HG45 (or 10101101 binary)
results in a theoretical linear voltage gain of 17.76 V/V,
calculated as
45 × 0.055744 × (1 + (7.079458 1) × 1)
Increments or decrements in gain within either gain range are
simply a matter of operating on the GainCode. Six –dB gain
steps, which are equivalent to doubling or halving the linear
voltage gain, are accomplished by doubling or halving the
GainCode.
When power is first applied to the AD8370, the device is
programmed to code LG0 to avoid overdriving the circuitry
following it.
POWER-UP FEATURE
The power-up feature does not affect the GainCode, and the
gain setting is preserved when in power-down mode. Powering
down the AD8370 (bringing PWUP low while power is still
applied to the device) does not erase or change the GainCode
from the AD8370, and the same gain code is in place when the
device is powered up, that is, when PWUP is brought high
again. Removing power from the device all together and
reapplying, however, reprograms to LG0.
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