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| 型號(hào)： | AD8370AREZ-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 13/28頁 |
| 文件大小： | 0K |
| 描述： | IC AMP VGA DIFF LN 16TSSOP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 放大器類型： | 可變增益 |
| 電路數(shù)： | 1 |
| 輸出類型： | 差分 |
| 轉(zhuǎn)換速率： | 5750 V/ns |
| -3db帶寬： | 750MHz |
| 電流 - 輸入偏壓： | 400pA |
| 電流 - 電源： | 79mA |
| 電壓 - 電源，單路/雙路(±)： | 3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm）裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 16-TSSOP-EP |
| 包裝： | 帶卷 (TR) |
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AD8370
Data Sheet
Rev. B | Page 20 of 28
VS
RS
2
RS
2
RL
2
RL
2
ZS
2
ZS
2
ZP
VS
RS
RL
ZS
ZP
SOURCE
LOAD
BALANCED
CONFIGURATION
SINGLE-ENDED
EQUIVALENT
03692-053
Figure 55. Single-Ended-to-Differential Network Conversion
As an example, a second-order, Butterworth, low-pass filter
design is presented where the differential load impedance is
1200 , and the padded source impedance of the AD8370 is
assumed to be 120 . The normalized series inductor value for
the 10-to-1, load-to-source impedance ratio is 0.074 H, and the
normalized shunt capacitor is 14.814 F. For a 70 MHz cutoff
frequency, the single-ended equivalent circuit consists of a
200 nH series inductor followed by a 27 pF capacitor. To realize
the balanced equivalent, simply split the 200 nH inductor in
half to realize the network shown in Figure 56.
03692-054
VS
RS
2
RS
RL
RS
2
RL
2
RL
2
27pF
VS
RS = 120
RL= 1200
200nH
100nH
27pF
BALANCED
CONFIGURATION
DE-NORMALIZED
SINGLE-ENDED
EQUIVALENT
VS
RS =
= 0.1
RL= 1
LN = 0.074H
CN
14.814F
NORMALIZED
SINGLE-ENDED
EQUIVALENT
= 60
= 60
= 600
= 600
fC = 70MHz
fC = 1Hz
Figure 56. Second-Order, Butterworth, Low-Pass Filter Design Example
A complete design example is shown in Figure 58. The AD8370
is configured for single-ended-to-differential conversion with
the input terminated down to present a single-ended 75 input.
A sixth-order Chebyshev differential filter is used to interface
the output of the AD8370 to the input of the AD9430
170 MSPS, 12-bit ADC. The filter minimizes aliasing effects
and improves harmonic distortion performance.
The input of the AD9430 is terminated with a 1.5 k resistor so
that the overall load presented to the filter network is ~1 k.
The variable gain of the AD8370 extends the useable dynamic
range of the ADC. The measured intermodulation distortion of
the combination is presented in Figure 57 at 42 MHz.
–130
–120
–100
–60
–40
–20
–10
0
–80
–110
–70
–50
–30
–90
dBFS
0
10
20
30
40
50
60
70
FREQUENCY (MHz)
03692-055
Figure 57. FFT Plot of Two-Tone Intermodulation Distortion at
42 MHz for the Circuit in Figure 58
In Figure 57, the intermodulation products are comparable to
the noise floor of the ADC. The spurious-free dynamic range of
the combination is better than 66 dB for a 70 MHz measurement
bandwidth.
3 V OPERATION
It is possible to operate the AD8370 at voltages as low as 3 V
with only minor performance degradation. Table 6 gives typical
specifications for operation at 3 V.
Table 6.
Parameter
Typical (70 MHz, RL = 100 )
Output IP3
+23.5 dBm
P1dB
+12.7 dBm
3 dB Bandwidth
650 MHz (HG 127)
IMD3
82 dBc (RL = 1 k)
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