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參數(shù)資料
| 型號： | AD8324JRQ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 3.3 V Upstream Cable Line Driver |
| 中文描述： | LINE DRIVER, PDSO20 |
| 封裝： | MO-137AD, QSOP-20 |
| 文件頁數(shù)： | 14/16頁 |
| 文件大小： | 516K |
| 代理商： | AD8324JRQ |
AD8324
OVERSHOOT ON PC PRINTER PORTS
The data lines on some PC parallel printer ports have excessive
overshoot, which may cause communications problems when
presented to the CLK pin of the AD8324. The evaluation board
was designed to accommodate a series resistor and shunt
capacitor (R9 and C5 in Figure 29) to filter the CLK signal if
required. For parallel ports with logic levels above 3.3 V, R9 and
C5 may be used as an attenuator.
Rev. 0 | Page 14 of 16
INSTALLING VISUAL BASIC CONTROL SOFTWARE
Install the CabDrive_24 software by running the setup.exe file
on disk one of the AD8324 evaluation software. Follow the on-
screen directions and insert disk two when prompted. Choose
the installation directory and then select the icon in the upper
left to complete the installation.
RUNNING AD8324 SOFTWARE
To load the control software, go to START, PROGRAMS,
CABDRIVE_24 or select the AD8324.exe file from the installed
directory. Once loaded, select the proper parallel port to
communicate with the AD8324 (Figure 27).
0
Figure 27. Parallel Port Selection
CONTROLLING GAIN/ATTENUATION
OF THE AD8324
The slide bar controls the gain/attenuation of the AD8324,
which is displayed in dB and in V/V. The gain scales 1 dB per
LSB. The gain code from the position of the slide bar is
displayed in decimal, binary, and hexadecimal (Figure 28).
0
Figure 28. Control Software Interface
TRANSMIT ENABLE AND SLEEP MODE
The Transmit Enable and Transmit Disable buttons select the
mode of operation of the AD8324 by asserting logic levels on
the asynchronous TXEN pin. The Transmit Disable button
applies Logic 0 to the TXEN pin, disabling forward transmis-
sion. The Transmit Enable button applies Logic 1 to the TXEN
pin, enabling the AD8324 for forward transmission. Checking
the Enable SLEEP Mode checkbox applies Logic 0 to the asyn-
chronous SLEEP pin, setting the AD8324 for SLEEP mode.
MEMORY FUNCTIONS
The Memory section of the software provides a way to alternate
between two gain settings. The X–>M1 button stores the
current value of the gain slide bar into memory, while the RM1
button recalls the stored value, returning the gain slide bar to
the stored level. The same applies to the X–>M2 and RM2
buttons.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD8324JRQ-EVAL | 3.3 V Upstream Cable Line Driver |
| AD8324JRQ-REEL | 3.3 V Upstream Cable Line Driver |
| AD8324JRQ-REEL7 | 3.3 V Upstream Cable Line Driver |
| AD8328 | 5 V Upstream Cable Line Driver |
| AD8328ACP | 5 V Upstream Cable Line Driver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD8324JRQ-EVAL | 制造商:AD 制造商全稱:Analog Devices 功能描述:3.3 V Upstream Cable Line Driver |
| AD8324JRQ-REEL | 制造商:Analog Devices 功能描述:SP Amp Line Driver Amp Single 3.47V 20-Pin QSOP T/R 制造商:Analog Devices 功能描述:SP AMP LINE DRVR AMP SGL 3.47V 20QSOP - Tape and Reel |
| AD8324JRQ-REEL7 | 制造商:Analog Devices 功能描述:SP Amp Line Driver Amp Single 3.47V 20-Pin QSOP T/R 制造商:Analog Devices 功能描述:SP AMP LINE DRVR AMP SGL 3.47V 20QSOP - Tape and Reel |
| AD8324JRQZ | 制造商:Analog Devices 功能描述:SP Amp Line Driver Amp Single 3.47V 20-Pin QSOP Tube |
| AD8324JRQZ-REEL | 功能描述:IC LINE DRIVER CBL 3.3V 20QSOP RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標準包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應用:移動電話，手機，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
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