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參數(shù)資料
| 型號(hào)： | AD8324JRQ-REEL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 3.3 V Upstream Cable Line Driver |
| 中文描述： | LINE DRIVER, PDSO20 |
| 封裝： | MO-137AD, QSOP-20 |
| 文件頁(yè)數(shù)： | 1/16頁(yè) |
| 文件大?。?/td> | 516K |
| 代理商： | AD8324JRQ-REEL7 |
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3.3 V Upstream
Cable Line Driver
AD8324
FEATURES
Supports DOCSIS 2.0 and Euro-DOCSIS standards for
reverse path transmission systems
Gain programmable in 1 dB steps over a 59 dB range
Low distortion at 61 dBmV output:
–59 dBc SFDR at 21 MHz
–54 dBc SFDR at 65 MHz
Output noise level @ minimum gain 1.3 nV/√Hz
Maintains 75 output impedance in TX-enable and
Transmit-disable condition
Upper bandwidth: 100 MHz (full gain range)
3.3 V supply operation
Supports SPI interfaces
APPLICATIONS
DOCSIS 2.0 and Euro-DOCSIS cable modems
CATV set-top boxes
CATV telephony modems
Coaxial and twisted pair line drivers
Rev.
0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
www.analog.com GENERAL DESCRIPTION
The AD8324
1
is a low cost amplifier designed for coaxial line
driving. The features and specifications make the AD8324
ideally suited for DOCSIS 2.0 and Euro-DOCSIS applications.
The gain of the AD8324 is digitally controlled. An 8-bit serial
word determines the desired output gain over a 59 dB range,
resulting in gain changes of 1 dB/LSB.
The AD8324 accepts a differential or single-ended input signal.
The output is specified for driving a 75 load through a 1:1
transformer.
Distortion performance of –54 dBc is achieved with an output
level up to 61 dBmV at 65 MHz bandwidth.
This device has a sleep mode function that reduces the quies-
cent current to 30 μA and a full power-down function that
reduces power-down current to 2.5 mA.
The AD8324 is packaged in a low cost 20-lead LFCSP package
and a 20-lead QSOP package. The AD8324 operates from a
single 3.3 V supply.
FUNCTIONAL BLOCK DIAGRAM
V
IN+
V
IN–
V
OUT+
V
OUT–
Z
IN
(SINGLE) = 550
Z
IN
(DIFF) = 1100
RAMP
Z
OUT
DIFF =
75
SHIFT
REGISTER
DATA LATCH
DECODE
POWER-
DOWN LOGIC
GND
DATEN
DATA
C
LK
TXEN
SLEEP
8
8
8
AD8324
VERNIER
DIFF
OR SINGLE
INPUT
AMP
OUTPUT
STAGE
BYP
ATTENUATION
CORE
0
Figure 1. Functional Block Diagram
FREQUENCY (MHz)
D
5
15
–80
–70
–50
–60
–40
25
35
45
55
65
0
V
= 61dBmV @ DEC 60
SECOND HARMONIC
V
= 61dBmV @ DEC 60
THIRD HARMONIC
Figure 2. Worst Harmonic Distortion vs. Frequency
1
Patent pending.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| AD8324JRQZ | 制造商:Analog Devices 功能描述:SP Amp Line Driver Amp Single 3.47V 20-Pin QSOP Tube |
| AD8324JRQZ-REEL | 功能描述:IC LINE DRIVER CBL 3.3V 20QSOP RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動(dòng)電話，手機(jī)，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
| AD8324JRQZ-REEL7 | 功能描述:IC LINE DRIVER CBL 3.3V 20QSOP RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 標(biāo)準(zhǔn)包裝:250 系列:- 類型:電平移位器 應(yīng)用:LCD 電視機(jī)/監(jiān)控器 安裝類型:表面貼裝 封裝/外殼:28-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:28-WQFN（4x4）裸露焊盤 包裝:帶卷 (TR) 其它名稱:296-32523-2TPS65198RUYT-ND |
| AD8325 | 制造商:AD 制造商全稱:Analog Devices 功能描述:5 V CATV Line Driver Fine Step Output Power Control |
| AD8325_05 | 制造商:AD 制造商全稱:Analog Devices 功能描述:5 V CATV Line Driver Fine Step Output Power Control |
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