參數(shù)資料
型號(hào): AD8328ARQ
廠商: ANALOG DEVICES INC
元件分類: 通用總線功能
英文描述: 5 V Upstream Cable Line Driver
中文描述: LINE DRIVER, PDSO20
封裝: QSOP-20
文件頁數(shù): 1/16頁
文件大?。?/td> 542K
代理商: AD8328ARQ
REV. 0
a
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
Tel: 781/329-
Analog Devices, Inc., 2002
AD8328
*
5 V Upstream
Cable Line Driver
FEATURES
Supports DOCSIS and EuroDOCSIS Standards for
Reverse Path Transmission Systems
Gain Programmable in 1 dB Steps over a 59 dB Range
Low Distortion at 60 dBmV Output:
57.5 dBc SFDR at 21 MHz
54 dBc SFDR at 65 MHz
Output Noise Level @ Minimum Gain 1.2 nV/
Hz
Maintains 300
Output Impedance TX-Enable and
Transmit-Disable Condition
Upper Bandwidth: 107 MHz (Full Gain Range)
5 V Supply Operation
Supports SPI Interfaces
APPLICATIONS
DOCSIS and EuroDOCSIS Cable Modems
CATV Set-Top Boxes
CATV Telephony Modems
Coaxial and Twisted Pair Line Driver
GENERAL DESCRIPTION
The AD8328 is a low cost amplifier designed for coaxial line
driving. The features and specifications make the AD8328
ideally suited for MCNS-DOCSIS and Euro-DOCSIS applica-
tions. The gain of the AD8328 is digitally controlled. An 8-bit
serial word determines the desired output gain over a 59 dB range,
resulting in gain changes of 1 dB/LSB.
The AD8328 accepts a differential or single-ended input signal. The
output is specified for driving a 75
load through a 2:1 transformer.
Distortion performance of
53 dBc is achieved with an output
level up to 60 dBmV at 65 MHz bandwidth over a wide tempera-
ture range.
This device has a sleep mode function that reduces the quiescent
current to 2.6 mA and a full power-down function that reduces
power-down current to 20
μ
A.
The AD8328 is packaged in a low cost 20-lead LFCSP package
and a 20-lead QSOP package. The AD8328 operates from a single
5 V supply and has an operational temperature range of
40
°
C
to +85
°
C.
FUNCTIONAL BLOCK DIAGRAM
DIFF OR
SINGLE
INPUT
AMP
ATTENUATION
CORE
Z
OUT
DIFF =
300
8
8
8
Z
IN
(SINGLE) = 800
Z
IN
(DIFF) = 1.6k
AD8328
DATEN
SDATA CLK
TXEN
SLEEP
V
OUT+
V
OUT–
V
IN+
V
IN–
VERNIER
DECODE
DATA LATCH
SHIFT
REGISTER
POWER-DOWN
LOGIC
POWER
AMP
BYP
GND
RAMP
5 15 25 35 45 55 65
FREQUENCY – MHz
D
V
= 60dBmV
@MAX GAIN,
THIRD HARMONIC
V
= 60 dBmV
@MAX GAIN,
SECOND HARMONIC
–70
–68
–66
–64
–62
–60
–58
–56
–54
–52
–50
Figure 1. Worst Harmonic Distortion vs. Frequency
*
Patent Pending
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