參數(shù)資料
型號: AD8321
廠商: Analog Devices, Inc.
英文描述: Gain Programmable CATV Line Driver(可編程增益CATV線驅(qū)動器)
中文描述: 增益可編程有線電視線路驅(qū)動器(可編程增益有線電視線驅(qū)動器)
文件頁數(shù): 7/9頁
文件大小: 64K
代理商: AD8321
(pc printer port)
DATEN
PD
3 (D1)
6
DATA
5 (D3)
1
CLK
6 (D4)
2
DGND
25 (GND)
13,15,16
TECHNCAL
AD8321
GND
GND
DATA 0
DATA 1
DATA 2
DATA 3
DATA 4
DATA 5
DATA 6
DATA 7
DATEN
PD
DATA
CLK
don't care
don't care
don't care
don't care
AD8321
Parallel Port
Figure 4. A parallel port can be used to drive the serial port of
the AD8321 without any external glue logic. Each of the serial
interfaces 4 bits is arbitrarily assigned to one of the parallel
port’s bits. A series of 22 parallel writes is required to clock and
latch a 7-bit serial data stream
Driving the serial interface of the AD8321 using a parallel
port
The serial interface of the AD8321 can be addressed through a
parallel port with 4 or more bits (plus ground) without the addition
of any external glue logic.
Firstly, each bit of the AD8321’s serial interface should be
assigned to one of the parallel port’s bits. How the bits are assigned
is completely arbitrary. The table shows how this assignment
was made in the case of the AD8321 evaluation board control
software.
Table I. Interconnection between PC printer port and AD8321
Signal
D-Sub-25
2 (D0)
3
This means that any word sent to the parallel port will result in
one bit being sent to each of the serial interface’s lines. So,
sending a series of bytes to the parallel port will result in the
serial interface receiving a serial data stream. All that remains to
implementing a serial connection to the AD8321 is the appropriate
formatting of the series of parallel words (a total of about 22
words to send and clock a 7-bit serial word). For example, we
can generate a clock signal by simply toggling the bit connected
to the AD8321’s CLK line. Obviously the bit connected to the
AD8321’s DATA line must be set up and held in advance and
after this toggle.
However if a serial interface is to be implemented, it is imperative
that the parallel interface can hold the state of the bits held steady
until the next word is written. It is also imperative that the word
switches cleanly (i.e. without going through any intermediate
states such as HEX00 or HEX11 for example) from one value to
the next.
Let’s say that we want to program the AD8321 with (decimal)
33. This first needs to be converted to binary (0100001). An
algorithm for doing this is listed in the appendix. Figure 5
shows a section of the word series that needs to be written to
the parallel port. Each of the seven bits must now be inserted
into the appropriate bytes as shown. The easiest way of doing
this is to “add” the particular bit, binary weighted according to
its position, to the byte to be written. i.e. to write the first byte
in figure 1, we would issue the command:
Write (Hex03 + D0 x 2
3
)
The complete clock cycle for this bit would look like
Write Hex03 + D0 x 2
3
: Write 00000011 and
insert D0 in to bit 3.
Clock is low
Set clock bit to high.
Hold data constant
Set clock bit to low.
Hold data constant
Write Hex13 + D0 x 2
3
:
Write Hex03 + D0 x 2
3
:
In this way, each of the seven bits is clocked into the AD8321.
The write cycle is completed by taking the
DATEN
low (write
Hex02) and back high again (write Hex03). The Visual Basic
code for the write cycle is listed in the appendix.
Rev 7.1 6/26/98 7
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參數(shù)描述
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AD8321ARZ2 制造商:AD 制造商全稱:Analog Devices 功能描述:Gain Programmable CATV Line DRiver