參數(shù)資料
型號: AD8260ACPZ-RL
廠商: Analog Devices Inc
文件頁數(shù): 13/32頁
文件大?。?/td> 0K
描述: IC AMP VGA DIFF LN 310MA 32LFCSP
標(biāo)準(zhǔn)包裝: 5,000
放大器類型: 可變增益
電路數(shù): 1
輸出類型: 差分
轉(zhuǎn)換速率: 730 V/µs
-3db帶寬: 195MHz
電流 - 輸入偏壓: 200nA
電流 - 電源: 28.3mA
電流 - 輸出 / 通道: 310mA
電壓 - 電源,單路/雙路(±): 3.3 V ~ 10 V,±3.3 V ~ 5 V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 32-LFCSP-VQ
包裝: 帶卷 (TR)
配用: AD8260-EVALZ-ND - BOARD EVAL FOR AD8260
AD8260
Rev. A | Page 20 of 32
THEORY OF OPERATION
OVERVIEW
The AD8260 is a self-contained transceiver intended for analog
communications using a power line as the media. Operating on
supplies as low as 3.3 V, it includes a high current driver usable
as a transmitter and a low noise digitally programmable variable
gain amplifier (DGA), usable as a receiver (see Figure 64). An
uncommitted current-feedback high frequency op amp acts as a
preamplifier and interface to the DGA and is user configured
for gains greater than 6 dB. Combined, the VGA and preamplifier
are usable at high signal levels from dc to 100 MHz, with a
small-signal 3 dB bandwidth of 230 MHz. To implement a
high current-output VGA, the VGA output can be connected
to the driver-amplifier differential input.
The small-signal 3 dB bandwidth of the driver amplifier is
195 MHz and the large-signal bandwidth is >115 MHz, even
when driving a 50 Ω load.
The device is fabricated on the Analog Devices, Inc., high speed
(eXtra Fast Complementary Bipolar) XFCB process. The pream-
plifier and DGA feature low dc offset voltage, and a nominal
gain range of 6 dB to +24 dB, a 30 dB gain span, and a differential
output for ADC driving. The power consumption is 93 mW
with a single 3.3 V supply. The supply current is typically about
28 mA when all circuits in the device are active. During normal
usage, either the driver amplifier is on or the preamplifier and
DGA are on and, therefore, the supply current in general is less
than 28 mA. The gain of the AD8260 VGA is programmed via a
4-bit parallel interface. Figure 64 shows the circuit block
diagram and basic application connections, and illustrates the
envisioned external DAC, ADC, and power-line bus interface
connections. The diagram shows the connections for single 3.3 V
supply operation; if a dual supply is available, the VMID
generator can be shut down and Pin VMDI, Pin VMDO, and
Pin VOCM need to be grounded. Note that Pin VNCM
functions as the negative supply for the bias and VMID cells,
plus the logic interfaces, and should always be tied to ground.
For optimal dynamic range, it is important that the inputs and
outputs to both the driver amplifier and the preamplifier and
the DGA output amplifier be ac-coupled in a single-supply
application. In Figure 64, the DAC and ADC are presumed to
operate on a 1.8 V or 3.3 V supply with a corresponding limited
output and input swing. The DAC outputs are currents that
point down and generate a voltage in the 50 Ω resistors that are
connected to ground. The maximum voltage with a peak DAC
output current of 15 mA is 0.75 V; if a DAC with a 20 mA peak
current is used, then the maximum voltage is 1 V per side for a
differential input signal of 2 V p-p.
The driver amplifier supports a 3 V p-p output swing on a
3.3 V supply. Because of its gain of 1.5, the maximum input
swing is 2 V p-p. The corresponding maximum output swing for
the DGA is 2.4 V p-p differential; the input to the preamplifier
can be a maximum of 0.6 V p-p.
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