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參數(shù)資料
| 型號： | AD8197-EVAL |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 4:1 HDMI/DVI Switch with Equalization |
| 中文描述： | 4:1的HDMI / DVI接口與均衡開關(guān) |
| 文件頁數(shù)： | 24/32頁 |
| 文件大小： | 486K |
| 代理商： | AD8197-EVAL |
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AD8197
Preliminary Technical Data
RECEIVER SETTINGS REGISTER
High speed (TMDS) channels input termination is fixed to on
when using the parallel interface.
PrA| Page 24 of 32
INPUT TERMINATION PULSE REGISTER 1 AND
REGISTER 2
High speed input (TMDS) channels pulse-on-source switching
fixed to off when using the parallel interface.
RECEIVE EQUALIZER REGISTER 1 AND REGISTER 2
PP_EQ: High Speed (TMDS) Inputs Equalization Level
Select Bit (For All TMDS Input Channels)
The input equalization cannot be set individually (per channel)
when using the parallel interface; one equalization setting
affects all input channels.
Table 28. PP_EQ Description
PP_EQ
0
1
Description
Low equalization (6 dB)
High equalization (12 dB)
TRANSMITTER SETTINGS REGISTER
PP_PE[1:0]: High Speed (TMDS) Output Pre-Emphasis
Level Select Bus (For All TMDS Channels)
Table 29. PP_PE[1:0] Description
PP_PE[1:0]
Description
00
No pre-emphasis (0 dB)
01
Low pre-emphasis (2 dB)
10
Medium pre-emphasis (4 dB)
11
High pre-emphasis (6 dB)
PP_OTO: High Speed (TMDS) Output Termination On/Off
Select Bit (For All TMDS Channels)
Table 30. PP_OTO Description
PP_OTO
Description
0
Output termination off
1
Output termination on
PP_OCL: High Speed (TMDS) Output Current Level Select
Bit (For All TMDS Channels)
Table 31. TX_OCL Description
PP_OCL
Description
0
Output current set to 10 mA
1
Output current set to 20 mA
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