參數(shù)資料
型號(hào)： AD8197-EVAL
廠商： Analog Devices, Inc.
英文描述： 4:1 HDMI/DVI Switch with Equalization
中文描述： 4:1的HDMI / DVI接口與均衡開關(guān)
文件頁(yè)數(shù)： 23/32頁(yè)
文件大?。?/td> 486K
代理商： AD8197-EVAL
Preliminary Data Sheet
AD8197
PARALLEL INTERFACE CONFIGURATION REGISTERS
The parallel interface configuration registers can be directly set using the PP_EN, PP_CH[1:0], PP_EQ, PP_PRE[1:0], PP_OTO, and
PP_OCL pins. This interface is only accessible after the part is reset and before any registers are accessed using the serial control interface.
The state of each pin is set by tying it to 3.3 V (Logic 1) or 0 V (Logic 0).
PrA | Page 23 of 32
Table 24. Parallel Interface Register Map
Name
Bit 7
High Speed
Device Modes
Bit 6
High speed
switch enable
PP_EN
Auxiliary
switch enable
1
Bit 5
High speed switching
mode select (quad)
0
Auxiliary switching
mode select (quad)
0
Bit 4
Bit 3
Bit 2
Bit 1
High speed source select
Bit 0
0
0
0
PP_CH[1]
Auxiliary switch source select
PP_CH[0]
Auxiliary Device
Modes
0
0
0
PP_CH[1]
PP_CH[0]
Input term. on/off
select (termination
always on)
1
Receiver
Settings
Source A and Source B input termination pulse-on-source switch select (termination always on)
0
0
0
Input
Termination
Pulse 1
Input
Termination
Pulse 2
Receive
Equalizer 1
0
0
0
0
0
Source C and Source D input termination pulse-on-source switch select (termination always on)
0
0
0
0
0
0
0
0
Source A and Source B input equalization level select
PP_EQ
PP_EQ
Source C and Source D input equalization level select
PP_EQ
PP_EQ
Output pre-emphasis
level select
PP_EQ
PP_EQ
PP_EQ
PP_EQ
PP_EQ
PP_EQ
Receive
Equalizer 2
PP_EQ
PP_EQ
PP_EQ
PP_EQ
PP_EQ
Output
termination
on/off select
PP_OTO
PP_EQ
Output current level
select
Transmitter
Settings
PP_PE[1]
PP_PE[0]
PP_OCL
HIGH SPEED DEVICE MODES REGISTER
The high speed (TMDS) switching mode is fixed to quad mode
when using the parallel interface.
PP_EN: High Speed (TMDS) Channels Enable Bit
Table 25. PP_EN Description
PP_EN
Description
0
High speed channels off, low power/standby mode
1
High speed channels on
PP_CH[1:0]: High Speed (TMDS) Switch Source Select Bus
Table 26. Quad High speed Switch Mode Mapping
PP_CH[1:0]
O[3:0]
Description
00
A[3:0]
High Speed Source A switched to
output
01
B[3:0]
High Speed Source B switched to
output
10
C[3:0]
High Speed Source C switched to
output
11
D[3:0]
High Speed Source D switched to
output
AUXILIARY DEVICE MODES REGISTER
The auxiliary (low speed) switch is always enabled and the
auxiliary switching mode is fixed to quad mode when using the
parallel interface.
PP_CH[1:0]: Auxiliary Switch Source Select Bus
Table 27. Quad Auxiliary Switch Mode Mapping
PP_CH[1:0]
AUX_COM[3:0]
00
AUX_A[3:0]
Description
Auxiliary Source A switched to
output
Auxiliary Source B switched to
output
Auxiliary Source C switched to
output
Auxiliary Source D switched to
output
01
AUX_B[3:0]0
10
AUX_C[3:0]
11
AUX_D[3:0]
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