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參數(shù)資料
| 型號(hào)： | AD8194ACPZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 16/16頁(yè) |
| 文件大小： | 0K |
| 描述： | IC TMDS SWITCH BUFF 2:1 32LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 功能： | 開關(guān) |
| 電路： | 4 x 2:1 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 32-LFCSP-VQ |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁(yè)面： | 775 (CN2011-ZH PDF) |
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AD8194
Rev. 0 | Page 9 of 16
THEORY OF OPERATION
INTRODUCTION
The primary function of the AD8194 is to switch the high speed
signals from one of two (HDMI or DVI) single-link sources to
one output. Each source group consists of four differential, high
speed channels. The four high speed channels include a data-
word clock and three Transition Minimized Differential Signaling
(TMDS) data channels running at 10× the data-word clock
frequency for data rates up to 2.25 Gbps. All four high speed
channels of the AD8194 are identical; that is, the pixel clock can
be run on any of the four TMDS channels. The AD8194 does
not provide switching of the low speed DDC and CEC signals.
The AD8194 is an equalized, buffered TMDS switch with low
added jitter. The output pins are electrically isolated from the
inputs and the input equalizer recovers and transmits an open,
full-swing data eye at the output, even for heavily attenuated
input signals.
Because the AD8194 is a TMDS-only switch, a complete HDMI
switch solution requires another component to switch the low
speed DDC channels. Several low cost CMOS switches can be
used along with the AD8194 to make an HDMI 1.3-compliant
2:1 link switch. The requirements for such a switch are as
follows:
Low input capacitance. The HDMI 1.3 specification limits
the total DDC link capacitance for an HDMI sink to less
than 50 pF. This 50 pF limit includes the HDMI connector,
the PCB, the capacitance of the CMOS switch, and what-
ever capacitance is seen at the input of the HDMI receiver.
Low channel on resistance (RON). Switches with high on
resistance degrade the quality of the DDC signals.
An appropriate form factor to switch the DDC and HPD
signals as necessary.
A reference design that incorporates the AD8194 and a low cost
CMOS switch is described in more detail in the Evaluation
Board section.
In addition to the AD8194, Analog Devices, Inc., offers several
HDMI switches with integrated DDC, in a variety of form
factors.
INPUT CHANNELS
Each high speed input differential pair terminates to the
3.3 V VTTI power supply through a pair of single-ended 50 Ω
on-chip resistors, as shown in Figure 19. These matched on-
chip terminations absorb reflections on the input TMDS
channels, properly terminating the inputs and improving
overall system signal integrity.
The input termination resistors all have series switches, as
shown in Figure 19. The state of these switches is determined by
the S_SEL signal, which also controls the input selection. The
termination switches for the selected input channel are closed
(terminations present), whereas the termination switches for
the unselected input are open (high-Z inputs).
The input equalizer of the AD8194 provides 12 dB of high
frequency boost. No specific cable length is suggested for use
with the AD8194 because cable performance varies widely
between manufacturers; however, in general, the equalization of
the AD8194 does not degrade the system signal integrity, even
for short input cables. For a 24 AWG reference cable, the
AD8194 can equalize more than 20 m at data rates up to 2.25
Gbps.
CABLE
EQ
50
IP_xx
IN_xx
AVEE
VTTI
0
7
004
-01
9
Figure 19. High Speed Input Simplified Schematic
OUTPUT CHANNELS
Each high speed output differential pair is terminated to the
3.3 V VTTO power supply through two single-ended 50 Ω
on-chip resistors, as shown in Figure 20. These matched on-
chip back terminations absorb reflections on the output TMDS
channels and improve the overall system signal integrity. These
termination resistors are always present in the outputs and they
cannot be switched out.
VTTO
50
OPx
ONx
AVEE
IOUT
07
00
4-
0
20
Figure 20. High Speed Output Simplified Schematic
In a typical application, the AD8194 output is connected to the
input of an HDMI/DVI receiver, which provides a second set of
matched terminations in accordance with the HDMI 1.3
specification. If no receiver is connected, each of the AD8194
output pins should be tied to 3.3 V through a 50 Ω on-board
termination resistor.
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|---|---|
| AD8194ACPZ-R7 | 功能描述:IC SWITCH TMDS BUFF 2:1 32LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 功能:多路復(fù)用器 電路:1 x 4:1 導(dǎo)通狀態(tài)電阻:- 電壓電源:雙電源 電壓 - 電源，單路/雙路(±):±5V 電流 - 電源:7mA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| AD8194-EVALZ | 制造商:Analog Devices 功能描述:EVAL BD FOR AD8194 - Bulk |
| AD8195ACPZ | 功能描述:IC BUFF HDMI/DVI W/EQUAL 40LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 其它有關(guān)文件:STG4159 View All Specifications 標(biāo)準(zhǔn)包裝:5,000 系列:- 功能:開關(guān) 電路:1 x SPDT 導(dǎo)通狀態(tài)電阻:300 毫歐 電壓電源:雙電源 電壓 - 電源，單路/雙路(±):±1.65 V ~ 4.8 V 電流 - 電源:50nA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:7-WFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:7-覆晶 包裝:帶卷 (TR) |
| AD8195ACPZ-R7 | 功能描述:IC BUFF HDMI/DVI W/EQUAL 40LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 功能:多路復(fù)用器 電路:1 x 4:1 導(dǎo)通狀態(tài)電阻:- 電壓電源:雙電源 電壓 - 電源，單路/雙路(±):±5V 電流 - 電源:7mA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| AD8195-EVALZ | 制造商:Analog Devices 功能描述:EVALUATION BOARD - Boxed Product (Development Kits) |
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