參數(shù)資料
型號: AD8185ARU-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 3/16頁
文件大小: 0K
描述: IC MULTIPLEXER TRPL 2X1 24TSSOP
標準包裝: 1,000
功能: 多路復用器
電路: 3 x 2:1
電壓電源: 雙電源
電壓 - 電源,單路/雙路(±): ±4.5 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應商設備封裝: 24-TSSOP
包裝: 帶卷 (TR)
REV. 0
AD8183/AD8185
–11–
Third, the additional power and ground pins also yield lower
impedance on the power and ground lines, and therefore minimize
the effects of shared impedances on crosstalk.
Signal routing is also important for keeping crosstalk low.
Shielding and separation should be used for signals that must
run parallel over some length on the PC board. If signals must
cross, the trace widths should be kept narrow, and the signals
should cross at right angles to minimize the capacitance between
the traces.
4:1 RGB Multiplexer
For selecting among four RGB sources to drive a monitor, two
AD8185s can be combined to make a 4:1 RGB multiplexer. A
circuit for this is shown in Figure 40. Each RGB source is con-
nected to either the three “A” or “B” inputs of one of the
AD8185s. In addition, all R signals are tied to “0” inputs, all
G signals are tied to “1” inputs, and all B signals are tied to “2”
inputs. All of these input signals should be terminated with the
standard 75
to ground very close to the IC pins.
Each of the outputs of the AD8185 has a series 75
resistor to
provide a back termination for the monitor load. Whichever
device is selected will drive the output signal through its three
termination resistors. When terminated by the monitor, the
voltage of these signals will be attenuated by a factor of two.
This is normalized by the gain-of-two of the AD8185.
Unlike many gain-of-two circuits, the impedance of the AD8185
is very high when it is disabled. This is due to a proprietary
circuit that disconnects the feedback network from a low imped-
ance when the part is disabled.
OE
OUT0
OUT1
OUT2
75
BLUE
GREEN
RED
TO
MONITOR
75
R
G
B
SOURCE 0
R
G
B
SOURCE 1
75
R
G
B
SOURCE 2
R
G
B
SOURCE 3
SEL 0
SEL 1
OE
SEL
A/B
IN2B
IN2A
IN1B
IN1A
IN0B
IN0A
OE
SEL
A/B
IN2B
IN2A
IN1B
IN1A
IN0B
IN0A
OUT0
OUT1
OUT2
75
200
100pF
200
100pF
Figure 40. 4:1 RGB Multiplexer
Two control bits are required to select the input source for the
RGB signals. One is applied to each of the SEL
A/B inputs of
each device to select between the two input sources for that
device. The other bit controls the
OE inputs of the two devices.
A delay circuit is provided for each device to ensure that the
outputs of one device are disabled before the outputs of the
other are enabled.
If the RGB signals contain the sync information, such as a sync-
on-Green, this circuit is all that is necessary for the full 4:1 RGB
mux. However, if sync is carried on separate signals, such as in
PCs, the sync signals can be multiplexed through a digital multi-
plexer that operates from the same SEL signals.
The RC in the
OE circuit is to ensure “Break-Before-Make”
operation. Using the values shown, a 20 ns time constant is
created. This will delay the enabling of the outputs of the new
selection until after the other devices’ outputs are disabled. This
time can be shortened or eliminated if the system can tolerate
the glitches caused by simultaneously enabled outputs.
EVALUATION BOARD
POWER AND GROUND
There are three power supply pins on the board. “VCC” is +5 V
analog, “VEE” is –5 V analog, and “DVCC” is +5 V digital.
These three power supply pins should be connected to good
quality, low noise supplies. If the same
± 5 V power supply is
used for both analog and digital, separate cables should be run
from the power supply to the evaluation board’s analog and digital
power supply pins.
Three 10
F tantalum capacitors (C1–C3) are located under the
power connector to decouple the power supplies as they first
enter the board. As the three supplies get close to the part, they
are again decoupled with 0.1
F ceramic capacitors (C4–C6).
Finally, each power pin of the device is locally decoupled with a
0.01
F ceramic capacitor (C7–C15).
The board has a separate analog and digital ground plane. With
the jumper at W5 installed, these two ground planes are tied
together on the board. Generally, this jumper should remain
installed.
INPUTS AND OUTPUTS
The evaluation board has been carefully laid out to demonstrate
the high speed performance of the device. Optimized for video
applications, all signal inputs are terminated with 75
resistors
to ground (R1–R6). The three outputs are backterminated with
75
series resistors (R12–R14). Stripline techniques are used
to achieve a 75
characteristic impedance on the input and
output lines. See Figure 41 for the arrangement of the PCB
layers.
TOP LAYER
75
SIGNAL LAYER
POWER
LAYER
50
SIGNAL LAYER
0.005" (127mm)
0.0026" (66mm)
0.0038" (96.5mm)
0.0176" (447mm)
0.028" (711mm)
0.005" (127mm)
Figure 41. PCB Dimensions
In addition, 75
BNC connectors are used on the six inputs
(J1–J6) and three outputs (J7–J9). The connectors are arranged
in a crescent around the device. This results in all the input and
output signal traces having the same length. Unused regions of
the multilayer board are filled up with ground planes. As a
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