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參數(shù)資料
| 型號(hào)： | AD8128ACPZ-RL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號(hào)調(diào)理 |
| 英文描述： | CAT-5 Receiver with Adjustable Line Equalization |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, DSO8 |
| 封裝： | 3 X 3 MM, LEAD FREE, LFCSP-8 |
| 文件頁數(shù)： | 5/12頁 |
| 文件大?。?/td> | 241K |
| 代理商： | AD8128ACPZ-RL |
AD8128
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Rev. 0 | Page 5 of 12
PIN 1
INDICATOR
1
2
3
4
V
IN+
V
IN–
V
GAIN
V
PEAK
7 V
OFFSET
6 V
OUT
5 VS–
8 VS+
TOP VIEW
(Not to Scale)
AD8128
0
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
1
V
IN+
2
V
IN
3
V
GAIN
4
V
PEAK
5
VS
6
V
OUT
7
V
OFFSET
8
VS+
EP
GND
Description
Positive Equalizer Input
Negative Equalizer Input
0 V to 1 V Broadband Gain Control
0 V to 1 V High Frequency Gain Control
Negative Power Supply
Equalizer Output
DC Offset Adjust
Positive Power Supply
Ground Reference and Thermal Pad (see Exposed Pad (EP) section).
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