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參數(shù)資料
| 型號： | AD8004 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Quad Current Feedback Amplifier(電流反饋四路放大器) |
| 中文描述： | 四電流反饋放大器（電流反饋四路放大器） |
| 文件頁數(shù)： | 10/16頁 |
| 文件大?。?/td> | 291K |
| 代理商： | AD8004 |
AD8004
REV. A
–10–
FREQUENCY – Hz
G
110
60
10
1M
10M
100M
1G
70
80
90
100
50
40
30
20
100k
–200
+50
0
–100
–150
P
PHASE
GAIN
Figure 31. Open-Loop Transimpedance Gain
DRIVING CAPACIT IVE LOADS
T he AD8004 was designed primarily to drive nonreactive loads.
If driving loads with a capacitive component is desired, best set-
tling response is obtained by the addition of a small series resis-
tance as shown in Figure 32. T he accompanying graph shows
the optimum value for R
SERIES
vs. capacitive load. It is worth
noting that the frequency response of the circuit when driving
large capacitive loads will be dominated by the passive roll-off of
R
SERIES
and C
L
.
1k
R
L
1k
C
L
AD8004
R
SERIES
1k
Figure 32. Driving Capacitive Load
40
30
20
0
10
15
20
25
C
L
– pF
10
R
S
5
Figure 33. Recommended R
SERIES
vs. Capacitive Load for
≤
30 ns Settling to 0.1%
OPT IMIZING FLAT NE SS
T he fine scale gain flatness and –3 dB bandwidth is affected by
R
FEEDBACK
selection as is normal of current feedback amplifiers.
With exception of gain = +1, the AD8004 can be adjusted for
either maximal flatness with modest closed-loop bandwidth or
for mildly peaked-up frequency response with much more band-
width. Figure 34 shows the effect of three evenly spaced R
F
changes upon gain = +1 and gain = +2. T able I shows the rec-
ommended component values for achieving maximally flat fre-
quency response as well as a faster slightly peaked-up frequency
response.
Printed circuit board parasitics and device lead frame parasitics
also control fine scale gain flatness. T he AD8004R package
because of its small lead frame offers superior parasitics relative
to the N package. In the printed circuit board environment,
parasitics such as extra capacitance caused by two parallel and
vertical flat conductors on opposite PC board sides in the
region of the summing junction will cause some bandwidth
extension and/or increased peaking. In noninverting gains, the
effect of extra capacitance on summing junctions is far more
pronounced than versus inverting gains. Figure 35 shows an
example of this. Note that only 1 pF of added junction capaci-
tance causes about a 70% bandwidth extension and additional
peaking on a gain = +2. For an inverting gain = –2, 5 pF of ad-
ditional summing junction capacitance caused a small 10%
bandwidth extension.
Extra output capacitive loading also causes bandwidth exten-
sions and peaking. T he effect is more pronounced with less
resistive loading from the next stage. Figure 36 shows the ef-
fect of direct output capacitive loads for gains of +2 and –2. For
both gains C
LOAD
was set to 10 pF or 0 pF (no extra capacitive
loading). For each of the four traces in Figure 36 the resistive
loads were 100
. Figure 37 also shows capacitive loading
effects only with a lighter output resistive load. Note that even
though bandwidth is extended 2
×
, the flatness dramatically
suffers.
FREQUENCY – MHz
–2
1
500
10
40
100
+1
0
–1
V
IN
= 50mV rms
V
S
=
±
5V
R
L
= 100
R PACKAGE
–3
–4
–5
N
+2
–3
0
+1
–1
–2
–4
–5
–6
R
F
= 1.10k
R
F
= 604
G = +1
G = +2
–7
–8
G
R
F
= 845
R
F
= 909
R
F
= 1.1k
R
F
= 698
Figure 34. R
FEEDBACK
vs. Frequency Response, G = +1/+2
FREQUENCY – MHz
+2
–8
1
500
10
40
100
–2
0
–4
–6
V
IN
= 50mV rms
R
L
= 100
±
5V
S
–10
–12
–14
N
N
+2
–8
–2
0
–4
–6
–10
–12
–14
C
J
= 1pF
C
J
= 0
C
J
= 5.1pF
C
J
= 0
G = +2
G = –2
Figure 35. Frequency Response vs. Added Summing
J unction Capacitance
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