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| 型號： | AD8002 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Dual 600 MHz, 50 mW Current Feedback Amplifier(600MHz,50mW雙電流反饋放大器) |
| 中文描述： | 雙600兆赫，50毫瓦電流反饋放大器（頻率600MHz，50mW的雙電流反饋放大器） |
| 文件頁數(shù)： | 2/16頁 |
| 文件大?。?/td> | 507K |
| 代理商： | AD8002 |
AD8002–SPECIFICATIONS
Model
Conditions
AD8002A
T yp
Min
Max
Units
DYNAMIC PERFORMANCE
–3 dB Small Signal Bandwidth,
N Package
G = +2, R
F
= 750
G = +1, R
F
= 1.21 k
G = +2, R
F
= 681
G = +1, R
F
= 953
500
600
500
600
MHz
MHz
MHz
MHz
R Package
Bandwidth for 0.1 dB Flatness
N Package
R Package
G = +2, R
F
= 750
G = +2, R
F
= 681
G = +2, V
O
= 2 V Step
G = –1, V
O
= 2 V Step
G = +2, V
O
= 2 V Step
G = +2, V
O
= 2 V Step, R
F
= 750
60
90
700
1200
16
2.4
MHz
MHz
V/
μ
s
V/
μ
s
ns
ns
Slew Rate
Settling T ime to 0.1%
Rise & Fall T ime
NOISE/HARMONIC PERFORMANCE
T otal Harmonic Distortion
f
C
= 5 MHz, V
O
= 2 V p-p
G = +2, R
L
= 100
f = 5 MHz, G = +2
f = 10 kHz, R
C
= 0
f = 10 kHz, +In
–In
NT SC, G = +2, R
L
= 150
NT SC, G = +2, R
L
= 150
f = 10 MHz
f = 10 MHz
f = 5 MHz
–65
dBc
Crosstalk, Output to Output
Input Voltage Noise
Input Current Noise
–60
2.0
2.0
18
0.01
0.02
33
14
–66
dB
nV/
√
Hz
pA/
√
Hz
pA/
√
Hz
%
Degree
dBm
dBm
dB
Differential Gain Error
Differential Phase Error
T hird Order Intercept
1 dB Gain Compression
SFDR
DC PERFORMANCE
Input Offset Voltage
2.0
2.0
10
5.0
6
9
mV
mV
μ
V/
°
C
±μ
A
±μ
A
±μ
A
±μ
A
k
k
T
MIN
–T
MAX
Offset Drift
–Input Bias Current
25
35
6.0
10
T
MIN
–T
MAX
+Input Bias Current
3.0
T
MIN
–T
V
O
±
2.5 V
T
MIN
–T
MAX
Open Loop T ransresistance
250
175
900
INPUT CHARACT ERIST ICS
Input Resistance
+Input
–Input
+Input
10
50
1.5
3.2
M
pF
±
V
Input Capacitance
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
Offset Voltage
–Input Current
+Input Current
V
CM
=
±
2.5 V
V
CM
=
±
2.5 V, T
MIN
–T
MAX
V
CM
=
±
2.5 V, T
MIN
–T
MAX
49
54
0.3
0.2
dB
μ
A/V
μ
A/V
1.0
0.9
OUT PUT CHARACT ERIST ICS
Output Voltage Swing
Output Current
2
Short Circuit Current
2
R
L
= 150
2.7
3.1
70
110
±
V
mA
mA
85
POWER SUPPLY
Operating Range
Quiescent Current/Both Amplifiers
Power Supply Rejection Ratio
±
3.0
±
6.0
11.5
V
mA
dB
dB
μ
A/V
μ
A/V
T
MIN
–T
MAX
+V
S
= +4 V to +6 V, –V
S
= –5 V
–V
S
= –4 V to –6 V, +V
S
= +5 V
T
MIN
–T
MAX
T
MIN
–T
MAX
10.0
75
56
0.5
0.1
60
49
–Input Current
+Input Current
2.5
0.5
NOT ES
1
R
C
is recommended to reduce peaking and minimize input reflections at frequencies above 300 MHz. However, R
C
is not required.
2
Output current is limited by the maximum power dissipation in the package. See the power derating curves.
Specifications subject to change without notice.
–2–
REV. B
(@ T
A
= + 25
8
C, V
S
=
±
5 V, R
L
= 100
V
, R
C1
= 75
V
, unless otherwse noted)
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