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| 型號： | AD7927BRU |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT 8CH 200KSPS 20TSSOP |
| 標準包裝： | 75 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 200k |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉換器數(shù)目： | 1 |
| 功率耗散（最大）： | 7.5mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 20-TSSOP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 8 個單端，單極 |
| 配用： | EVAL-AD7927CBZ-ND - BOARD EVALUATION FOR AD7927 |
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Data Sheet
AD7927
Rev. D | Page 17 of 28
TYPICAL CONNECTION DIAGRAM
Figure 20 shows a typical connection diagram for the AD7927.
In this setup, the AGND pin is connected to the analog ground
led 2.5 V supply from a reference source, the AD780, to provide
an analog input range of 0 V to 2.5 V (if the RANGE bit is 1)
or 0 V to 5 V (if the RANGE bit is 0). Although the AD7927 is
connected to a AVDD of 5 V, the serial interface is connected to a
3 V microprocessor. The VDRIVE pin of the AD7927 is connected
to the same 3 V supply of the microprocessor to allow a 3 V
logic interface (see the Digital Inputs section). The conversion
result is output in a 16-bit word. This 16-bit data stream consists
of one leading zero, three address bits indicating which channel
the conversion result corresponds to, followed by the 12 bits of
conversion data. For applications where power consumption is
of concern, the power-down modes should be used between
conversions or bursts of several conversions to improve power
performance (see the Modes of Operation section).
AD780
2.5V
AD7927
AVDD
SCLK
DOUT
DIN
NOTES
ALL UNUSED INPUT CHANNELS SHOULD BE CONNECTED TO AGND.
5V
SUPPLY
10F
0.1F
SERIAL
INTERFACE
M
IC
R
OC
ON
T
R
OLL
E
R
/
M
IC
R
O
PR
O
C
ESS
O
R
VDRIVE
REFIN
VIN0
VIN7
AGND
0.1F
10F
0.1F
3V
SUPPLY
0V TO REFIN
CS
03
08
8-
0
20
Figure 20. Typical Connection Diagram
ANALOG INPUT SELECTION
Any one of eight analog input channels may be selected for
conversion by programming the multiplexer with the address
bits (ADD2 though ADD0) in the control register. The channel
configurations are shown in Table 7.
The AD7927 may also be configured to automatically cycle
through a number of channels as selected. The sequencer feature is
accessed via the SEQ and SHADOW bits in the control register
(see Table 9). The AD7927 can be programmed to continuously
convert on a selection of channels in ascending order. The analog
input channels to be converted on are selected through program-
ming the relevant bits in the shadow register (see Table 10). The
next serial transfer then acts on the sequence programmed by
executing a conversion on the lowest channel in the selection.
The next serial transfer results in the conversion on the next
highest channel in the sequence, and so on.
It is not necessary to write to the control register once a
sequencer operation has been initiated. The WRITE bit must
be set to zero or the DIN line tied low to ensure that the control
register is not accidentally overwritten, or the sequence opera-
tion interrupted. If the control register is written to at any time
during the sequence, the user must ensure that the SEQ and
SHADOW bits are set to 1, 0, respectively to avoid interrupting
the automatic conversion sequence. This pattern continues until
such time as the AD7927 is written to and the SEQ and SHADOW
bits are configured with any bit combination except 1, 0. On
completion of the sequence, the AD7927 sequencer returns to
the first selected channel in the shadow register and commence
the sequence again.
Rather than selecting a particular sequence of channels, a
number of consecutive channels beginning with Channel 0
may also be programmed via the control register alone without
needing to write to the shadow register. This is possible if the
SEQ and SHADOW bits are set to 1, 1, respectively. The channel
address bits, ADD2 through ADD0, then determine the final
channel in the consecutive sequence. The next conversion is on
Channel 0, then Channel 1, and so on until the channel selected
via the Address Bit ADD2 through Address Bit ADD0 is reached.
The cycle begins again on the next serial transfer provided the
WRITE bit is set to low, or if high, that the SEQ and SHADOW
bits are set to 1, 0, respectively; then the ADC continues its pre-
programmed automatic sequence uninterrupted.
Regardless of which channel selection method is used, the
16-bit word output from the AD7927 during each conversion
always contains one leading zero, three channel address bits
that the conversion result corresponds to, followed by the 12-bit
conversion result (see the Serial Interface section).
DIGITAL INPUTS
The digital inputs applied to the AD7927 are not limited by
the maximum ratings that limit the analog inputs. Instead, the
digital inputs applied can go to 7 V and are not restricted by the
AVDD + 0.3 V limit as on the analog inputs.
Another advantage of SCLK, DIN, and CS not being restricted
by the AVDD + 0.3 V limit is that possible power supply sequenc-
ing issues are avoided. If CS, DIN, or SCLK are applied before
AVDD, there is no risk of latch-up as there would be on the analog
inputs if a signal greater than 0.3 V was applied prior to AVDD.
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