AD7910/AD7920
Rev. C | Page 3 of 24
SPECIFICATIONS
AD7910
VDD = 2.35 V to 5.25 V, fSCLK = 5 MHz, fSAMPLE = 250 kSPS, TA = TMIN to TMAX, unless otherwise noted.
Table 1.
Unit
Test Conditions/Comments
DYNAMIC PERFORMANCE
fIN = 100 kHz sine wave
Signal-to-Noise + Distortion (SINAD)
361
dB min
Total Harmonic Distortion (THD)
372
dB max
Peak Harmonic or Spurious Noise
(SFDR)373
dB max
Intermodulation Distortion
(IMD)3Second-Order Terms
82
dB typ
fa = 100.73 kHz, fb = 90.7 kHz
Third-Order Terms
82
dB typ
fa = 100.73 kHz, fb = 90.7 kHz
Aperture Delay
10
ns typ
Aperture Jitter
30
ps typ
Full Power Bandwidth
13.5
MHz typ
@ 3 dB
2
MHz typ
@ 0.1 dB
DC ACCURACY
Resolution
10
Bits
Integral Nonlinearity
±0.5
LSB max
Differential Nonlinearity
±0.5
LSB max
Guaranteed no missed codes to 10 bits
±1
LSB max
±1
LSB max
Total Unadjusted Error (TUE)
3,
4±1.2
LSB max
ANALOG INPUT
Input Voltage Ranges
0 to VDD
V
DC Leakage Current
±0.5
μA max
Input Capacitance
20
pF typ
Track-and-hold in track, 6 pF typ when in hold
LOGIC INPUTS
Input High Voltage, VINH
2.4
V min
Input Low Voltage, VINL
0.8
V max
VDD = 5 V
0.4
V max
VDD = 3 V
Input Current, IIN, SCLK Pin
± 0.5
μA max
Typically 10 nA, VIN = 0 V or VDD
Input Current, IIN, CS Pin
± 10
nA typ
5
pF max
LOGIC OUTPUTS
Output High Voltage, VOH
VDD 0.2
V min
ISOURCE = 200 μA, VDD = 2.35 V to 5.25 V
Output Low Voltage, VOL
0.4
V max
ISINK = 200 μA
Floating-State Leakage Current
±1
μA max
Floating-State Output Capacitanc
e55
pF max
Output Coding
Straight (natural) binary
CONVERSION RATE
Conversion Time
2.8
μs max
14 SCLK cycles with SCLK at 5 MHz
Track-and-Hold Acquisition Time
3250
ns max
Throughput Rate
250
kSPS max
POWER REQUIREMENTS
VDD
2.35/5.25
V min/max
IDD
Digital I/Ps = 0 V or VDD
Normal Mode (Static)
2.5
mA typ
VDD = 4.75 V to 5.25 V, SCLK on or off
1.2
mA typ
VDD = 2.35 V to 3.6 V, SCLK on or off
Normal Mode (Operational)
3
mA max
VDD = 4.75 V to 5.25 V, fSAMPLE = 250 kSPS
1.4
mA max
VDD = 2.35 V to 3.6 V, fSAMPLE = 250 kSPS
Full Power-Down Mode
1
μA max
Typically 50 nA