VIN1
參數(shù)資料
型號(hào): AD7911AUJZ-R2
廠商: Analog Devices Inc
文件頁數(shù): 2/28頁
文件大?。?/td> 0K
描述: IC ADC 10BIT 250KSPS TSOT23-8
標(biāo)準(zhǔn)包裝: 1
位數(shù): 10
采樣率(每秒): 250k
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 20mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: SOT-23-8 薄型,TSOT-23-8
供應(yīng)商設(shè)備封裝: TSOT-23-8
包裝: 標(biāo)準(zhǔn)包裝
輸入數(shù)目和類型: 2 個(gè)單端,單極
其它名稱: AD7911AUJZ-R2DKR
AD7911/AD7921
Rev. A | Page 10 of 28
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
04350-0-008
VIN1
VIN0
GND
VDD
8
7
6
5
DIN
1
SCLK
2
CS
3
DOUT
4
AD7911/
AD7921
8-LEAD TSOT
TOP VIEW
(Not to Scale)
Figure 8. 8-Lead TSOT Pin Configuration
04350-0-034
VDD
GND
VIN0
VIN1
8
7
6
5
DOUT
1
CS
2
SCLK
3
DIN
4
AD7911/
AD7921
8-LEAD MSOP
TOP VIEW
(Not to Scale)
Figure 9. 8-Lead MSOP Pin Configuration
Table 5. Pin Function Descriptions
TSOT
Pin No.
MSOP
Pin No.
Mnemonic
Function
1
4
DIN
Data In. Logic input. The channel to be converted is provided on this input and is clocked into an
internal register on the falling edge of SCLK.
2
3
SCLK
Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock
input is also used as the clock source for the AD7911/AD7921’s conversion process.
3
2
CS
Chip Select. Active low logic input. This input provides the dual function of initiating conversions on
the AD7911/AD7921 and framing the serial data transfer.
4
1
DOUT
Data Out. Logic output. The conversion result from the AD7911/AD7921 is provided on this output as a
serial data stream. The bits are clocked out on the falling edge of the SCLK signal.
For the AD7921, the data stream consists of two leading zeros; the channel identifier bit, which
identifies the channel that the conversion result corresponds to; followed by an invalid bit that
matches up to the channel identifier bit; followed by the 12 bits of conversion data, with MSB first.
For the AD7911, the data stream consists of two leading zeros; the channel identifier bit, which
identifies the channel that the conversion result corresponds to; followed by an invalid bit that
matches up to the channel identifier bit; followed by the 10 bits of conversion data, with MSB first and
two trailing zeros.
5
8
VDD
Power Supply Input. The VDD range for the AD7911/AD7921 is from 2.35 V to 5.25 V.
6
7
GND
Analog Ground. Ground reference point for all circuitry on the AD7911/AD7921. All analog input
signals should be referred to this GND voltage.
7, 8
6, 5
VIN0, VIN1
Analog Inputs. These two single-ended analog input channels are multiplexed into the on-chip track-
and-hold amplifier. The analog input channel to be converted is selected by writing to the third MSB
on the DIN pin. The input range is 0 to VDD.
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