VDD = 5V INPUT SIGNAL" />
參數(shù)資料
型號(hào)： AD7829BRUZ-REEL
廠商： Analog Devices Inc
文件頁數(shù)： 4/28頁
文件大小： 0K
描述： IC ADC 8BIT 8CHAN 2MSPS 28TSSOP
標(biāo)準(zhǔn)包裝： 2,500
位數(shù)： 8
采樣率（每秒）： 2M
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 36mW
電壓電源： 單電源
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 28-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 28-TSSOP
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 8 個(gè)單端，單極
AD7822/AD7825/AD7829
Rev. C | Page 12 of 28
5V
4V
3V
2V
1V
VDD = 5V
INPUT SIGNAL RANGE
FOR VARIOUS VMID
VMID = N/C (1.25V)
VMID = 2.5V
VMID = 3.75V
3V
2V
1V
VDD = 3V
INPUT SIGNAL RANGE
FOR VARIOUS VMID
VMID = N/C (1V)
VMID = 1.5V
VMID = 2V
0
13
21
-01
1
Figure 11. Analog Input Span Variation with VMID
VMID can be used to remove offsets in a system by applying the
offset to the VMID pin as shown in Figure 12, or it can be used to
accommodate bipolar signals by applying VMID to a level-shifting
circuit before VIN, as shown in Figure 13. When VMID is being
driven by an external source, the source can be directly tied to
the level-shifting circuitry (see Figure 13). However, if the
internal VMID, that is, the default value, is being used as an
output, it must be buffered before applying it to the level-
shifting circuitry because the VMID pin has an impedance of
approximately 6 kΩ (see Figure 14).
VIN
VMID
AD7822/
AD7825/
AD7829
VMID
VIN
VMID
0
132
1-
0
12
Figure 12. Removing Offsets Using VMID
VREF
VMID
VIN
R3
R4
R2
R1
V
0V
VIN
0V
2.5V
AD7822/
AD7825/
AD7829
2.5V
01
32
1-
0
13
Figure 13. Accommodating Bipolar Signals Using External VMID
R2
VREF
VMID
VIN
EXTERNAL
2.5V
R3
R4
R1
V
0V
VIN
0V
VMID
AD7822/
AD7825/
AD7829
01
32
1
-01
4
Figure 14. Accommodating Bipolar Signals Using Internal VMID
NOTE: Although there is a VREF pin from which a voltage
reference of 2.5 V can be sourced, or to which an external
reference can be applied, this does not provide an option of
varying the value of the voltage reference. As stated in the
specifications for the AD7822/AD7825/AD7829, the input
voltage range at this pin is 2.5 V ± 2%.
Analog Input Structure
Figure 15 shows an equivalent circuit of the analog input
structure of the AD7822/AD7825/AD7829. The two diodes,
D1 and D2, provide ESD protection for the analog inputs. Care
must be taken to ensure that the analog input signal never
exceeds the supply rails by more than 200 mV. Doing so causes
these diodes to become forward biased and start conducting
current into the substrate. A maximum current of 20 mA can be
conducted by these diodes without causing irreversible damage
to the part. However, it is worth noting that a small amount of
current (1 mA) being conducted into the substrate, due to an
overvoltage on an unselected channel, can cause inaccurate
conversions on a selected channel.
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