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參數(shù)資料
| 型號： | AD7827BRZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 8/12頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 8BIT SAMPLING SRL 8SOIC |
| 產(chǎn)品變化通告： | AD7827 Series Discontinuation 18/Jul/2012 |
| 標(biāo)準包裝： | 1,000 |
| 位數(shù)： | 8 |
| 采樣率（每秒）： | 1M |
| 數(shù)據(jù)接口： | DSP，串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 30mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個單端，單極 |
AD7827
–5–
REV. 0
TERMINOLOGY
Signal-to-(Noise + Distortion) Ratio
This is the measured ratio of signal-to-(noise + distortion) at
the output of the A/D converter. The signal is the rms amplitude
of the fundamental. Noise is the rms sum of all nonfundamental
signals up to half the sampling frequency (fS/2), excluding dc.
The ratio is dependent upon the number of quantization levels in
the digitization process; the more levels, the smaller the quantiza-
tion noise. The theoretical signal-to-(noise + distortion) ratio for
an ideal N-bit converter with a sine wave input is given by:
Signal-to-(Noise + Distortion) = (6.02N + 1.76) dB
Thus for an 8-bit converter, this is 50 dB.
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the rms sum of
harmonics to the fundamental. For the AD7827 it is defined as:
THD (dB)
= 20 log
V2
2 +V
3
2 +V
4
2 +V
5
2 +V
6
2
V1
where V1 is the rms amplitude of the fundamental and V2, V3, V4,
V5 and V6 are the rms amplitudes of the second through the sixth
harmonics.
Peak Harmonic or Spurious Noise
Peak harmonic or spurious noise is defined as the ratio of the
rms value of the next largest component in the ADC output
spectrum (up to fS/2 and excluding dc) to the rms value of the
fundamental. Normally, the value of this specification is deter-
mined by the largest harmonic in the spectrum, but for parts
where the harmonics are buried in the noise floor, it will be a
noise peak.
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies, fa and
fb, any active device with nonlinearities will create distortion
products at sum and difference frequencies of mfa
± nfb where
m, n = 0, 1, 2, 3, etc. Intermodulation terms are those for
which neither m nor n are equal to zero. For example, the sec-
ond order terms include (fa + fb) and (fa – fb), while the third
order terms include (2fa + fb), (2fa – fb), (fa + 2fb) and (fa – 2fb).
The AD7827 is tested using the CCIF standard where two
input frequencies near the top end of the input bandwidth are
used. In this case, the second and third order terms are of dif-
ferent significance. The second order terms are usually dis-
tanced in frequency from the original sine waves while the third
order terms are usually at a frequency close to the input fre-
quencies. As a result, the second and third order terms are
specified separately. The calculation of the intermodulation
distortion is as per the THD specification where it is the ratio
of the rms sum of the individual distortion products to the rms
amplitude of the fundamental expressed in dBs.
Relative Accuracy
Relative accuracy or endpoint nonlinearity is the maximum
deviation from a straight line passing through the endpoints of
the ADC transfer function.
Differential Nonlinearity
This is the difference between the measured and the ideal
1 LSB change between any two adjacent codes in the ADC.
Offset Error
This is the deviation of the 128th code transition (01111111) to
(10000000) from the ideal, i.e., VREF/2 (VDD = 5 V), 0.8 VREF/2
(VDD = 3 V).
Zero Scale Error
This is the deviation of the first code transition (00000000) to
(00000001) from the ideal, i.e., V
REF/2 –1.25 V + 1 LSB (VDD =
5 V
± 10%), or 0.8 V
REF/2 –1.0 V + 1 LSB (VDD = 3 V
± 10%).
Full-Scale Error
This is the deviation of the last code transition (11111110) to
(11111111) from the ideal, i.e., V
MID + 1.25 V – 1 LSB (VDD =
5 V
± 10%), or V
MID + 1.0 V – 1 LSB (VDD = 3 V
± 10%).
Gain Error
This is the deviation of the last code transition (1111 . . . 110) to
(1111 . . . 111) from the ideal, i.e., VREF – 1 LSB, after the offset
error has been adjusted out.
Track/Hold Acquisition Time
Track/hold acquisition time is the time required for the output
of the track/hold amplifier to reach its final value, within
±1/2 LSB, after the point at which the track/hold returns to
track mode. This happens approximately 120 ns after the falling
edge of
CONVST.
It also applies when there is a step input change on the input
voltage applied to the VIN input of the AD7827. It means that
the user must wait for the duration of the track/hold acquisition
time after the end of conversion or after a step input change to
VIN before starting another conversion, to ensure that the part
operates to specification.
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