參數(shù)資料
型號: AD7763BSVZ-REEL
廠商: Analog Devices Inc
文件頁數(shù): 10/33頁
文件大?。?/td> 0K
描述: IC ADC 24BIT S/D 625KSPS 64-TQFP
標(biāo)準(zhǔn)包裝: 1,500
位數(shù): 24
采樣率(每秒): 625k
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 955.5mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 64-TQFP-EP(10x10)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 1 個差分,單極;1 個差分,雙極
Data Sheet
AD7763
Rev. B | Page 17 of 32
all FSO and SDI pins can be tied together and each device written
to individually by setting the appropriate address bits in the serial
32-bit word. The exception to this is when all devices can be written
to at the same time by setting the ALL bit to logic high.
Thus, if this bit is set to logic high, every device on the serial
bus accepts the data written, regardless of the address bits. This
feature is particularly attractive if, for example, four devices are
being configured with the same user-defined filter. Instead of
having to download the filter configuration four times, only one
write is required. See the Downloading a User-Defined Filter
section for further details.
Writing to AD7763 is allowed at any time, even while reading a
conversion result. Note that after writing to the devices, valid
data is not output until after the settling time for the filter has
elapsed. The DVALID status bit is asserted at this point to
indicate that the filter has settled and that valid data is available
at the output.
READING STATUS AND OTHER REGISTERS
The AD7763 features a number of programmable registers. To
read back the contents of these registers or the status register,
the user must first write to the control register of the device,
setting a bit corresponding to the register to be read. The next
read operation then outputs the contents of the selected register
instead of a conversion result.
To ensure that the next read cycle contains the contents of the
register that has been written to, the write operation to the register
in question must be completed a minimum of 8 × tSCO before
the falling edge of DRDY, which indicates the start of the next
read cycle.
More information on the relevant bits in the control register is
provided in the Registers section.
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