參數(shù)資料
型號: AD7760BSV
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: 2.5 MSPS, 20-Bit ADC
中文描述: 1-CH 20-BIT DELTA-SIGMA ADC, PARALLEL ACCESS, PQFP64
封裝: TQFP-64
文件頁數(shù): 16/22頁
文件大小: 868K
代理商: AD7760BSV
AD7760
Preliminary Technical Data
USING THE AD7760
The following is the recommended sequence for powering up
and using the AD7760.
Rev. PrN | Page 16 of 22
1.
Apply Power
2.
Start clock oscillator, applying MCLK
3.
Take RESET low for a minimum of 1 MCLK cycle
4.
Wait a minimum of 2 MCLK cycles after RESET has
been released.
5.
Write to Control Register 2 to power up the ADC and
the differential amplifiers as required. The correct
Clock Divider (CDIV[1:0]) ratio should be
programmed here also.
6.
Write to Control Register 1 to set up the Output Data
Rate.
7.
Take SYNC low for a minimum of 2 MCLK cycles.
Data can now be read from the part using the default filter,
offset, gain and over range threshold values. The
conversion data read will not be valid however until the
group delay of the filter has passed. When this has
occurred, the DVALID bit read with the data LSW will be
set indicating that the data is indeed valid.
The user can now download their own filter if required
(see Downloading a User-Defined Filter). Values for gain,
offset and over range threshold registers can be written or
read at this stage. An internal calibration sequence can also
be initiated at this point.
BIAS RESISTOR SELECTION
The AD7760 requires a resistor to be connected between the
R
BIAS
pin and AGND. The value for this resistor is dependant on
the reference voltage being applied to the device. The resistor
value should be selected to give a current of 25μA through the
resistor to ground. For a 2.5V reference voltage, the correct
resistor value is 100k
and for a 4.096V reference, 160k
.
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