參數(shù)資料
型號: AD7751ABRS
廠商: ANALOG DEVICES INC
元件分類: 模擬信號調(diào)理
英文描述: ECONOLINE: RB & RA - Dual Output from a Single Input Rail- Power Sharing on Output- Industry Standard Pinout- 1kVDC & 2kVDC Isolation- Custom Solutions Available- UL94V-0 Package Material- Efficiency to 85%
中文描述: SPECIALTY ANALOG CIRCUIT, PDSO24
封裝: SSOP-24
文件頁數(shù): 2/16頁
文件大?。?/td> 249K
代理商: AD7751ABRS
REV. A
–2–
AD7751–SPECIFICATIONS
1, 2
(AV
DD
= DV
DD
= 5 V 5%, AGND = DGND = 0 V, On-Chip Reference, CLKIN =
Parameter
A Version
B Version
3.58 MHz, T
MIN
to T
MAX
= –40 C to +85 C)
Unit
Test Conditions/Comments
ACCURACY
3
Measurement Error
1
on Channels 1 and 2
Gain = 1
Gain = 2
Gain = 8
Gain = 16
Phase Error
1
Between Channels
V1 Phase Lead 37
°
(PF = 0.8 Capacitive)
V1 Phase Lag 60
°
(PF = 0.5 Inductive)
AC Power Supply Rejection
1
Output Frequency Variation (CF)
One Channel with Full-Scale Signal (
±
660 mV)
Over a Dynamic Range 500 to 1
Over a Dynamic Range 500 to 1
Over a Dynamic Range 500 to 1
Over a Dynamic Range 500 to 1
Line Frequency = 45 Hz to 55 Hz
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
% Reading typ
% Reading typ
% Reading typ
% Reading typ
±
0.1
±
0.1
Degrees(
°
) max
AC/
DC
= 0 and AC/
DC
= 1
±
0.1
±
0.1
Degrees(
°
) max
AC/
DC
= 0 and AC/
DC
= 1
AC/
DC
= 1, S0 = S1 = 1, G0 = G1 = 0
V1 = 100 mV rms, V2 = 100 mV rms @ 50 Hz
Ripple on AV
DD
of 200 mV rms @ 100 Hz
AC/
DC
= 1, S0 = S1 = 1, G0 = G1 = 0
V1 = 100 mV rms, V2 = 100 mV rms,
AV
DD
= DV
DD
= 5 V
±
250 mV
0.2
0.2
% Reading typ
DC Power Supply Rejection
1
Output Frequency Variation (CF)
±
0.3
±
0.3
% Reading typ
FAULT DETECTION
1, 4
Fault Detection Threshold
Inactive i/p <> Active i/p
Input Swap Threshold
Inactive i/p > Active i/p
Accuracy Fault Mode Operation
V1A Active, V1B = AGND
V1B Active, V1A = AGND
Fault Detection Delay
Swap Delay
See Fault Detection Section
12.5
12.5
% typ
(V1A or V1B Active)
14
14
% of Active typ
(V1A or V1B Active)
0.1
0.1
3
3
0.1
0.1
3
3
% Reading typ
% Reading typ
Second typ
Second typ
Over a Dynamic Range 500 to 1
Over a Dynamic Range 500 to 1
ANALOG INPUTS
Maximum Signal Levels
Input Impedance (DC)
Bandwidth
ADC Offset Error
1
Gain Error
1
See Analog Inputs Section
V1A, V1B
,
V1N, V2N and V2P to AGND
CLKIN = 3.58 MHz
CLKIN/256, CLKIN = 3.58 MHz
See Terminology and Performance Graphs
External 2.5 V Reference, Gain = 1,
V1 = V2 = 660 mV dc
External 2.5 V Reference
±
1
390
14
±
20
±
4
±
1
390
14
±
20
±
4
V max
k
min
kHz typ
mV max
% Ideal typ
Gain Error Match
1
±
0.2
±
0.2
% Ideal typ
REFERENCE INPUT
REF
IN/OUT
Input Voltage Range
2.7
2.3
3.2
10
2.7
2.3
3.2
10
V max
V min
k
min
pF max
2.5 V + 8%
2.5 V – 8%
Input Impedance
Input Capacitance
ON-CHIP REFERENCE
Reference Error
Temperature Coefficient
Nominal 2.5 V
±
200
±
30
±
200
±
30
±
60
mV max
ppm/
°
C typ
ppm/
°
C max
CLKIN
Input Clock Frequency
Note All Specifications for CLKIN of 3.58 MHz
4
1
4
1
MHz max
MHz min
LOGIC INPUTS
5
SCF, S0, S1, AC/
DC
,
RESET
, G0 and G1
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
Input Capacitance, C
IN
2.4
0.8
±
3
10
2.4
0.8
±
3
10
V min
V max
μ
A max
pF max
DV
DD
= 5 V
±
5%
DV
DD
= 5 V
±
5%
Typically 10 nA, V
IN
= 0 V to DV
DD
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