參數(shù)資料
型號: AD7738BRUZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 11/28頁
文件大?。?/td> 0K
描述: IC ADC 24BIT 8CH SIG-DEL 28TSSOP
標(biāo)準(zhǔn)包裝: 1,000
位數(shù): 24
采樣率(每秒): 15.4k
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 100mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 28-TSSOP
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 8 個(gè)單端,單極;8 個(gè)單端,雙極;4 個(gè)差分,單極;4 個(gè)差分,雙極
配用: EVAL-AD7738EBZ-ND - BOARD EVAL FOR AD7738
REV. 0
AD7738
–19–
MD2
MD1
MD0
Operating Mode
000
Idle Mode
The default mode after Power-On or Reset.
The AD7738 returns to this mode automatically after any calibration or after a single conversion.
001
Continuous Conversion Mode
The AD7738 performs a conversion on the specified channel. After the conversion is complete, the
relevant Channel Data register and Channel Status register are updated, the relevant RDY bit in the
ADC status register is set, and the AD7738 continues converting on the next enabled channel. The AD7738
will cycle through all enabled channels until put into another mode or reset. The cycle period will be the
sum of all enabled channels’ conversion times, set by corresponding Channel Conversion Time registers.
010
Single Conversion Mode
The AD7738 performs a conversion on the specified channel. After the conversion is complete, the
relevant Channel Data register and Channel Status register are updated, the relevant RDY bit in the
ADC status register is set, the
RDY pin goes low, the MD2, MD1, and MD0 bits are reset, and AD7738
returns to the Idle mode. Requesting a single conversion ignores the Channel Setup registers’ Enable bits
and a conversion will be performed even if that channel is disabled.
011
Power-Down (Standby) Mode
The ADC and the analog front end (internal buffer) go into the power-down mode. The AD7738 digital
interface can still be accessed. The CLKDIS bit works separately, the MCLKOUT mode is not affected
by Power-Down (Standby) mode.
100
ADC Zero-Scale Self-Calibration Mode
A zero-scale self-calibration is performed on internally shorted ADC inputs. After the calibration is
complete, the contents of the ADC Zero-Scale Calibration register are updated, all RDY bits in the ADC
status register are set, the
RDY pin goes low, the MD2, MD1, and MD0 bits are reset, and the AD7738
returns to the Idle mode.
101
For Future Use
110
Channel Zero-Scale System Calibration Mode
A zero-scale system calibration is performed on the selected channel. An external system zero-scale
voltage should be provided at the AD7738 analog input and this voltage should remain stable for the
duration of the calibration. After the calibration is complete, the contents of the corresponding Channel
Zero Scale Calibration register are updated, all RDY bits in the ADC status register are set, the
RDY pin
goes low, the MD2, MD1, and MD0 bits are reset, and AD7738 returns to the Idle mode.
111
Channel Full-Scale System Calibration Mode
A full-scale system calibration is performed on the selected channel. An external system full-scale voltage
should be provided at the AD7738 analog input and this voltage should remain stable for the duration of
the calibration. After the calibration is complete, the contents of the corresponding Channel Full-Scale
Calibration register are updated, all RDY bits in the ADC status register are set, the
RDY pin goes low,
the MD2, MD1, and MD0 bits are reset, and AD7738 returns to the Idle mode.
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AD7738BRUZ-REEL IC ADC 24BIT 8CH SIG-DEL 28TSSOP
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