參數(shù)資料
型號(hào)： AD7715ARUZ-3
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 26/40頁(yè)
文件大?。?/td> 0K
描述： IC ADC 16BIT SIGMA-DELTA 16TSSOP
標(biāo)準(zhǔn)包裝： 1
位數(shù)： 16
采樣率（每秒）： 500
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 9.5mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 16-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 16-TSSOP
包裝： 管件
輸入數(shù)目和類型： 1 個(gè)差分，單極；1 個(gè)差分，雙極
配用： EVAL-AD7715-3EBZ-ND - BOARD EVALUATION FOR AD7715
AD7715
Rev. D | Page 32 of 40
MICROCONTROLLER/MICROPROCESSOR INTERFACING
The flexible serial interface of the AD7715 allows for easy
interface to most microcontrollers and microprocessors. The
flow chart of Figure 10 outlines the sequence which should be
followed when interfacing a microcontroller or microprocessor
to the AD7715. Figure 11, Figure 12, and Figure 13 show some
typical interface circuits.
The serial interface on the AD7715 has the capability of operating
from just three wires and is compatible with SPI interface
protocols. The three-wire operation makes the part ideal for
isolated systems where minimizing the number of interface
lines minimizes the number of opto-isolators required in the
system. The rise and fall times of the digital inputs to the AD7715
(especially the SCLK input) should be no longer than 1 μs.
Most of the registers on the AD7715 are 8-bit registers. This
facilitates easy interfacing to the 8-bit serial ports of micro-
controllers. Some of the registers on the part are up to 16 bits,
but data transfers to these 16-bit registers can consist of a full
16-bit transfer or two 8-bit transfers to the serial port of the
microcontroller. DSP processors and microprocessors generally
transfer 16 bits of data in a serial data operation. Some of these
processors, such as the ADSP-2105, have the facility to program
the amount of cycles in a serial transfer. This allows the user to
tailor the number of bits in any transfer to match the register
length of the required register in the AD7715.
Even though some of the registers on the AD7715 are only
eight bits in length, communicating with two of these registers
in successive write operations can be handled as a single 16-bit
data transfer if required. For example, if the setup register is to
be updated, the processor must first write to the communications
register (saying that the next operation is a write to the setup
register) and then write eight bits to the setup register. This
can all be done in a single 16-bit transfer if required because
once the eight serial clocks of the write operation to the
communications register have been completed, the part
immediately sets itself up for a write operation to the setup
register.
AD7715 TO 68HC11 INTERFACE
Figure 11 shows an interface between the AD7715 and the
68HC11 microcontroller. The diagram shows the minimum
(three-wire) interface with CS on the AD7715 hardwired low. In
this scheme, the DRDY bit of the communications register is
monitored to determine when the data register is updated. An
alternative scheme, which increases the number of interface
lines to four, is to monitor the DRDY output line from the
AD7715. The monitoring of the DRDY line can be done in
two ways. First, DRDY can be connected to one of the 68HC11’s
port bits (such as PC0) which is configured as an input. This
port bit is then polled to determine the status of DRDY. The
second scheme is to use an interrupt driven system, in which
case the DRDY output is connected to the IRQ input of the
68HC11. For interfaces that require control of the CS input on
the AD7715, one of the port bits of the 68HC11 (such as PC1),
which is configured as an output, can be used to drive the CS input.
AD7715
DOUT
SCLK
CS
68HC11
SS
DVDD
RESET
DIN
SCK
MISO
MOSI
08
51
9-
0
11
Figure 11. AD7715 to 68HC11 Interface
The 68HC11 is configured in the master mode with its CPOL
bit set to a Logic 1 and its CPHA bit set to a Logic 1. When the
68HC11 is configured like this, its SCLK line idles high between
data transfers. The AD7715 is not capable of full duplex
operation. If the AD7715 is configured for a write operation, no
data appears on the DOUT lines even when the SCLK input is
active. Similarly, if the AD7715 is configured for a read
operation, data presented to the part on the DIN line is ignored
even when SCLK is active.
Coding for an interface between the 68HC11 and the AD7715 is
In this example, the DRDY output line of the AD7715 is con-
nected to the PC0 port bit of the 68HC11 and is polled to
determine its status.
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