- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373914 > AD7715AN-3 (ANALOG DEVICES INC) 3 V/5 V, 450 uA 16-Bit, Sigma-Delta ADC PDF資料下載
參數(shù)資料
| 型號(hào)： | AD7715AN-3 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 3 V/5 V, 450 uA 16-Bit, Sigma-Delta ADC |
| 中文描述： | 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDIP16 |
| 封裝： | 0.300 INCH, PLASTIC, MS-001AB, DIP-16 |
| 文件頁數(shù)： | 15/31頁 |
| 文件大?。?/td> | 474K |
| 代理商： | AD7715AN-3 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁當(dāng)前第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁
AD7715
–15–
REV. C
C
SAMP
must be charged through R
SW
and through any external
source impedances every input sample cycle. Therefore, in
unbuffered mode, source impedances mean a longer charge time
for C
SAMP
, and this may result in gain errors on the part. Table
XIV shows the allowable external resistance/capacitance values,
for unbuffered mode, such that no gain error to the 16-bit level
is introduced on the part. Note that these capacitances are total
capacitances on the analog input, external capacitance plus
10 pF capacitance from the pins and lead frame of the device.
Table XIV. External R, C Combination for No 16-Bit Gain
Error (Unbuffered Mode Only)
Gain
External Capacitance (pF)
10
152 k
53.9 k
31.4 k
8.4 k
75.1 k
26.6 k
15.4 k
4.14 k
2.36 k
670
16.7 k
5.95 k
3.46 k
924
16.7 k
5.95 k
3.46 k
924
50
100
500
1000
4.76 k
1.36 k
5000
1
2
32
128
526
526
150
150
In buffered mode, the analog inputs look into the high imped-
ance inputs stage of the on-chip buffer amplifier. C
SAMP
is
charged via this buffer amplifier such that source impedances do
not affect the charging of C
SAMP
. This buffer amplifier has an
offset leakage current of 1 nA. In this buffered mode, large
source impedances result in a small dc offset voltage developed
across the source impedance but not in a gain error.
Input Sample Rate
The modulator sample frequency for the AD7715 remains at
f
CLKIN
/128 (19.2kHz @ f
CLK IN
= 2.4576MHz) regardless of
the selected gain. However, gains greater than 1 are achieved by
a combination of multiple input samples per modulator cycle
and a scaling of the ratio of reference capacitor to input capaci-
tor. As a result of the multiple sampling, the input sample rate
of the device varies with the selected gain (see Table XV). In
buffered mode, the input is buffered before the input sampling
Table XV. Input Sampling Frequency vs. Gain
Gain
Input Sampling Freq (f
S
)
f
CLK IN
/64 (38.4kHz @ f
CLK IN
= 2.4576MHz)
2
f
CLK IN
/64 (76.8kHz @ f
CLK IN
= 2.4576MHz)
8
×
f
CLK IN
/64 (307.2kHz @ f
CLK IN
= 2.4576MHz)
8
×
f
CLK IN
/64 (307.2kHz @ f
CLK IN
= 2.4576MHz)
capacitor. In unbuffered mode, where the analog input looks
directly into the sampling capacitor, the effective input imped-
ance is 1/C
SAMP
×
f
S
where C
SAMP
is the input sampling capaci-
tance and f
S
is the input sample rate.
Bipolar/Unipolar Inputs
The analog input on the AD7715 can accept either unipolar or
bipolar input voltage ranges. Bipolar input ranges do not imply
that the part can handle negative voltages on its analog input
since the analog input cannot go more negative than –30mV to
ensure correct operation of the part. The input channel is fully
differential. As a result, the voltage to which the unipolar and
bipolar signals on the AIN(+) input are referenced is the voltage
on the respective AIN(–) input. For example, if AIN(–) is
+2.5V and the AD7715 is configured for unipolar operation
1
2
32
128
SCLK
MCLK IN
DGND
DV
DD
MCLK OUT
DIN
DOUT
AGND
AIN(+)
AIN(–)
REF IN(+)
REF IN(–)
AV
DD
AD7715
0.1
m
F
ANALOG
GROUND
DIFFERENTIAL
ANALOG INPUT
DIGITAL
GROUND
0.1
m
F
10
m
F
V
OUT
V
IN
GND
AD780
ANALOG
+5V SUPPLY
DATA READY
RECEIVE (READ)
SERIAL DATA
SERIAL CLOCK
CRYSTAL OR
CERAMIC
RESONATOR
+5V
0.1
m
F
10
m
F
ANALOG
+5V SUPPLY
RESET
CS
DRDY
Figure 2. AD7715-5 Basic Connection Diagram
ANALOG INPUT
Analog Input Ranges
The AD7715 contains a differential analog input pair AIN(+)
and AIN(–). This input pair provides a programmable-gain,
differential input channel which can handle either unipolar or
bipolar input signals. It should be noted that the bipolar input
signals are referenced to the respective AIN(–) input of the
input pair.
In unbuffered mode, the common-mode range of the input is
from AGND to AV
DD
provided that the absolute value of the
analog input voltage lies between AGND–30mV and
AV
DD
+30mV. This means that in unbuffered mode the part
can handle both unipolar and bipolar input ranges for all gains.
In buffered mode, the analog inputs can handle much larger
source impedances but the absolute input voltage range is re-
stricted to between AGND+ 50mV to AV
DD
– 1.5V which
also places restrictions on the common-mode range. This means
that in buffered mode there are some restrictions on the allow-
able gains for bipolar input ranges. Care must be taken in set-
ting up the common-mode voltage and input voltage range so
that the above limits are not exceeded, otherwise there will be a
degradation in linearity performance.
In unbuffered mode, the analog inputs look directly into the
input sampling capacitor, C
SAMP
. The dc input leakage current
in this unbuffered mode is 1nA maximum. As a result, the
analog inputs see a dynamic load that is switched at the input
sample rate (see Figure 3). This sample rate depends on master
clock frequency and selected gain. C
SAMP
is charged to AIN(+)
and discharged to AIN(–) every input sample cycle. The effec-
tive on-resistance of the switch, R
SW
, is typically 7k
.
HIGH
IMPEDANCE
1G
V
R
SW
(7k
V
TYP)
C
(10pF )
V
BIAS
SWITCHING FREQUENCY
DEPENDS ON
f
CLKIN
AND SELECTED GAIN
AIN(+)
AIN(–)
Figure 3. Unbuffered Analog Input Structure
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD7715AN-5 | 3 V/5 V, 450 uA 16-Bit, Sigma-Delta ADC |
| AD7715AR-3 | 3 V/5 V, 450 uA 16-Bit, Sigma-Delta ADC |
| AD7715AR-5 | 3 V/5 V, 450 uA 16-Bit, Sigma-Delta ADC |
| AD7715* | 3 V/5 V. 450 uA 16-Bit. Sigma-Delta ADC |
| AD7715ACHIPS-3 | 3 V/5 V, 450 uA 16-Bit, Sigma-Delta ADC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7715AN-5 | 功能描述:IC ADC 16BIT 5V 16-DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個(gè)單端，單極；1 個(gè)單端，雙極 |
| AD7715ANZ-3 | 功能描述:IC ADC 16BIT SIGMA-DELTA 16DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個(gè)單端，單極；1 個(gè)單端，雙極 |
| AD7715ANZ-31 | 制造商:AD 制造商全稱:Analog Devices 功能描述:3 V/5 V, 450 ??A 16-Bit, Sigma-Delta ADC |
| AD7715ANZ-5 | 功能描述:IC ADC 16BIT 5V 16-DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個(gè)單端，單極 產(chǎn)品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| AD7715ANZ-5 | 制造商:Analog Devices 功能描述:A/D Converter (A-D) IC |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。