參數(shù)資料
型號(hào)： AD7712AN
廠商： ANALOG DEVICES INC
元件分類： ADC
英文描述： LC2MOS Signal Conditioning ADC
中文描述： 2-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDIP24
封裝： 0.300 INCH, PLASTIC, DIP-24
文件頁數(shù)： 3/28頁
文件大小： 229K
代理商： AD7712AN
Parameter
REFERENCE OUTPUT
Output Voltage
Initial Tolerance
Drift
Output Noise
Line Regulation (AV
DD
)
Load Regulation
External Current
V
BIAS
INPUT
13
A, S Versions
1
Units
Conditions/Comments
2.5
±
1
20
30
1
1.5
1
V nom
% max
ppm/
°
C typ
μ
V typ
mV/V max
mV/mA max
mA max
pk-pk Noise; 0.1 Hz to 10 Hz Bandwidth
Maximum Load Current 1 mA
AV
– 0.85
×
V
REF
or AV
DD
– 3.5
See V
Input Section
Whichever Is Smaller; +5 V/–5 V or +10 V/0 V
Nominal AV
/V
Whichever Is Smaller; +5 V/0 V Nominal AV
DD
/V
SS
See V
Input Section
Whichever Is Greater; +5 V/–5 V or +10 V/0 V
Nominal AV
DD
/V
SS
Whichever Is Greater; +5 V/0 V Nominal AV
DD
/V
SS
Increasing with Gain
V max
or AV
– 2.1
V
+ 0.85
×
V
REF
or V
SS
+ 3
V max
V min
or V
SS
+ 2.1
65 to 85
V min
dB typ
V
BIAS
Rejection
LOGIC INPUTS
Input Current
All Inputs except MCLK IN
V
INL
, Input Low Voltage
V
, Input High Voltage
MCLK IN Only
V
INL
, Input Low Voltage
V
INH
, Input High Voltage
LOGIC OUTPUTS
V
OL
, Output Low Voltage
V
, Output High Voltage
Floating State Leakage Current
Floating State Output Capacitance
14
TRANSDUCER BURNOUT
Current
Initial Tolerance
Drift
SYSTEM CALIBRATION
AIN1
Positive Full-Scale Calibration Limit
15
Negative Full-Scale Calibration Limit
15
Offset Calibration Limit
16, 17
Input Span
15
±
10
μ
A max
0.8
2.0
V max
V min
0.8
3.5
V max
V min
0.4
4.0
±
10
9
V max
V min
μ
A max
pF typ
I
SINK
= 1.6 mA
I
SOURCE
= 100
μ
A
4.5
±
10
0.1
μ
A nom
% typ
%/
°
C typ
(1.05
×
V
REF
)/GAIN
–(1.05
×
V
REF
)/GAIN
–(1.05
×
V
REF
)/GAIN
0.8
×
V
REF
/GAIN
(2.1
×
V
REF
)/GAIN
V max
V max
V max
V min
V max
GAIN Is the Selected PGA Gain (Between 1 and 128)
GAIN Is the Selected PGA Gain (Between 1 and 128)
GAIN Is the Selected PGA Gain (Between 1 and 128)
GAIN Is the Selected PGA Gain (Between 1 and 128)
GAIN Is the Selected PGA Gain (Between 1 and 128)
AIN2
Positive Full-Scale Calibration Limit
15
Negative Full-Scale Calibration Limit
15
Offset Calibration Limit
17
Input Span
15
(4.2
×
V
REF
)/GAIN
–(4.2
×
V
REF
)/GAIN
–(4.2
×
V
REF
)/GAIN
3.2
×
V
REF
/GAIN
(8.4
×
V
REF
)/GAIN
V max
V max
V max
V min
V max
GAIN Is the Selected PGA Gain (Between 1 and 128)
GAIN Is the Selected PGA Gain (Between 1 and 128)
GAIN Is the Selected PGA Gain (Between 1 and 128)
GAIN Is the Selected PGA Gain (Between 1 and 128)
GAIN Is the Selected PGA Gain (Between 1 and 128)
NOTES
13
The AD7712 is tested with the following V
voltages. With AV
DD
= +5 V and V
SS
= 0 V, V
BIAS
= +2.5 V; with AV
DD
= +10 V and V
SS
= 0 V, V
BIAS
= +5 V and
with AV
= +5 V and V
= –5 V, V
= 0 V.
14
Guaranteed by design, not production tested.
15
After calibration, if the analog input exceeds positive full scale, the converter will output all 1s. If the analog input is less than negative full scale, then the device will
output all 0s.
16
These calibration and span limits apply provided the absolute voltage on the AIN1 analog inputs does not exceed AV
DD
+ 30 mV or does not go more negative
than V
– 30 mV.
17
The offset calibration limit applies to both the unipolar zero point and the bipolar zero point.
AD7712
–3–
REV. E
相關(guān)PDF資料
PDF描述
AD7712AQ LC2MOS Signal Conditioning ADC
AD7712AR LC2MOS Signal Conditioning ADC
AD7712SQ LC2MOS Signal Conditioning ADC
AD7712* Rail-to-Rail, Very Low Noise Universal Dual Filter Building Block; Package: SSOP; No of Pins: 16; Temperature Range: 0°C to +70°C
AD7712 Signal Conditioning ADC(LC2MOS信號(hào)調(diào)節(jié)A/D轉(zhuǎn)換器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD7712ANZ 功能描述:IC ADC SIGNAL COND LC2MOS 24-DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個(gè)單端，單極；2 個(gè)差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6
AD7712ANZ 制造商:Analog Devices 功能描述:IC ADC 24-BIT SIGMA DELTA
AD7712AQ 制造商:Rochester Electronics LLC 功能描述:24 BIT SIGMA DELTA ADC IC - Bulk
AD7712AR 功能描述:IC ADC SIGNAL COND LC2MOS 24SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個(gè)單端，雙極
AD7712AR-REEL 制造商:Analog Devices 功能描述:ADC Single Delta-Sigma 1.028ksps 24-bit Serial 24-Pin SOIC W T/R 制造商:Analog Devices 功能描述:ADC SGL DELTA-SIGMA 1.028KSPS 24BIT SERL 24SOIC W - Tape and Reel
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*