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參數(shù)資料
| 型號： | AD7711AN |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | LC2MOS Signal Conditioning ADC with RTD Excitation Currents |
| 中文描述： | 2-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDIP24 |
| 封裝： | 0.300 INCH, PLASTIC, MO-095AG, DIP-24 |
| 文件頁數(shù)： | 10/28頁 |
| 文件大?。?/td> | 242K |
| 代理商： | AD7711AN |
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REV. F
–10–
AD7711
PGA Gain
G2
0
0
0
0
1
1
1
1
Channel Selection
CH
0
1
Power-Down
PD
0
1
Word Length
WL
0
1
RTD Excitation Current
IO
0
1
Burnout Current
BO
0
1
Bipolar/Unipolar Selection (Both Inputs)
B/U
0
Bipolar
1
Unipolar
Filter Selection (FS11–FS0)
The on-chip digital filter provides a Sinc
3
(or (Sinx/x)
3
) filter response. The 12 bits of data programmed into these bits determine
the filter cutoff frequency, the position of the first notch of the filter and the data rate for the part. In association with the gain selec-
tion, it also determines the output noise (and hence the effective resolution) of the device.
The first notch of the filter occurs at a frequency determined by the relationship: filter first notch frequency = (f
CLK IN
/512)/
code
where
code
is the decimal equivalent of the code in bits FS0 to FS11 and is in the range 19 to 2,000. With the nominal f
CLK IN
of
10 MHz, this results in a first notch frequency range from 9.76 Hz to 1.028 kHz. To ensure correct operation of the AD7711, the
value of the code loaded to these bits must be within this range. Failure to do this will result in unspecified operation of the device.
Changing the filter notch frequency, as well as the selected gain, impacts resolution. Tables I and II and Figure 2 show the effect of
the filter notch frequency and gain on the effective resolution of the AD7711. The output data rate (or effective conversion time) for
the device is equal to the frequency selected for the first notch of the filter. For example, if the first notch of the filter is selected at
50 Hz, then a new word is available at a 50 Hz rate or every 20 ms. If the first notch is at 1 kHz, a new word is available every 1 ms.
The settling time of the filter to a full-scale step input change is worst case 4
×
1/(output data rate). This settling time is to 100% of
the final value. For example, with the first filter notch at 50 Hz, the settling time of the filter to a full-scale step input change is
80 ms max. If the first notch is at 1 kHz, the settling time of the filter to a full-scale input step is 4 ms max. This settling time can be
reduced to 3
×
1/(output data rate) by synchronizing the step input change to a reset of the digital filter. In other words, if the step
input takes place with
SYNC
low, the settling time will be 3
×
1/(output data rate). If a change of channels takes place, the settling
time is 3
×
1/(output data rate) regardless of the
SYNC
input.
The –3 dB frequency is determined by the programmed first notch frequency according to the relationship: filter –3 dB frequency
= 0.262
×
first notch frequency.
Gl
0
0
1
1
0
0
1
1
G0
0
1
0
1
0
1
0
1
Gain
1
2
4
8
16
32
64
128
(Default Condition After the Internal Power-On Reset)
Channel
AIN1
AIN2
(Default Condition After the Internal Power-On Reset)
Normal Operation
Power-Down
(Default Condition After the Internal Power-On Reset)
Output Word Length
16-bit
24-bit
(Default Condition After Internal Power-On Reset)
Off
On
(Default Condition After Internal Power-On Reset)
Off
On
(Default Condition After Internal Power-On Reset)
(Default Condition After Internal Power-On Reset)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD7711AQ | LC2MOS Signal Conditioning ADC with RTD Excitation Currents |
| AD7711AR | LC2MOS Signal Conditioning ADC with RTD Excitation Currents |
| AD7711SQ | LC2MOS Signal Conditioning ADC with RTD Excitation Currents |
| AD7711* | LC2MOS Signal Conditioning ADC with RTD Excitation Currents |
| AD7711A | Signal Conditioning ADC with RTD Current Source(帶RTD電流源信號調(diào)節(jié)A/D轉(zhuǎn)換器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7711ANZ | 功能描述:IC ADC 24BIT RTD I SOURCE 24-DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標準包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD7711ANZ | 制造商:Analog Devices 功能描述:IC ADC 24-BIT SIGMA DELTA |
| AD7711AQ | 功能描述:IC ADC 24BIT RTD I SOURCE 24CDIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD7711AR | 功能描述:IC ADC 24BIT RTD I SOURCE 24SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD7711AR-REEL | 功能描述:IC ADC 24BIT RTD I SOURCE 24SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
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