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參數(shù)資料
| 型號： | AD7709ARU |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 6/32頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 16BIT SIGMA-DELTA 24TSSOP |
| 產(chǎn)品變化通告： | Product Discontinuance 27/Oct/2011 |
| 標準包裝： | 62 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 105 |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 3.75mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 24-TSSOP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 2 個差分，單極；2 個差分，雙極；4 個偽差分，單極；4 個偽差分，雙極 |
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REV. A
AD7709
–14–
Communications Register (A1, A0 = 0, 0)
The Communications Register is an 8-bit write-only register. All communications to the part must start with a write operation to the
Communications Register. The data written to the Communications Register determines whether the next operation is a read or
write operation, and to which register this operation takes place. For read or write operations, once the subsequent read or write
operation to the selected register is complete, the interface returns to where it expects a write operation to the Communications
Register. This is the default state of the interface, and on power-up or after a
RESET, the AD7709 is in this default state waiting for
a write operation to the Communications Register. In situations where the interface sequence is lost, a write operation of at least 32
serial clock cycles with DIN high, returns the AD7709 to this default state by resetting the part. Table IV outlines the bit designations for
the Communications Register. CR0 to CR7 indicate the bit location, CR denoting the bits are in the Communications Register. CR7
denotes the first bit of the data stream.
7
R
C6
R
C5
R
C4
R
C3
R
C2
R
C1
R
C0
R
C
N
E
W
)
0
(
/
R W
)
0
()
0
(
Y
B
T
S)
0
(
D
P
C
S
O)
0
(
0)
0
(
0)
0
(
1
A)
0
(
A
Table IV. Communications Register Bit Designations
Bit
Location
Name
Description
CR7
WEN
Write Enable Bit.
A 0 must be written to this bit so the write operation to the Communications Register actually takes place.
If a 1 is written to this bit, the part will not clock on to subsequent bits in the register. It will stay at this
bit location until a 0 is written to this bit. Once a 0 is written to the
WEN bit, the next seven bits will be
loaded to the Communications Register.
CR6
R/
W
A 0 in this bit location indicates that the next operation will be a write to a specified register.
A 1 in this position indicates that the next operation will be a read from the designated register.
CR5
STBY
Standby Bit Location.
A 1 in this location places the AD7709 in low power mode.
A 0 in this location powers up the AD7709.
CR4
OSCPD
Oscillator Power-Down Bit.
If this bit is set, placing the AD7709 in standby mode will stop the crystal oscillator also, reducing the
power consumed by the part to a minimum. The oscillator will require 300 ms to begin oscillating when
the ADC is taken out of power-down mode.
If this bit is cleared, the oscillator is not stopped when the ADC is placed in power-down mode. When
the ADC is taken out of power-down mode, the oscillator does not require the 300 ms start-up time.
CR3–CR2
0
These bits must be programmed with a Logic 0 for correct operation.
CR1–CR0
A1–A0
Register Address Bits. These address bits are used to select which of the AD7709 registers are accessed
during this serial interface communication.
Table V. Register Selection Table
A1
A0
Register
00Communications Register during a Write Operation
00
Status Register during a Read Operation
01Configuration Register
10Filter Register
11
ADC Data Register
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