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REV. A
AD7707
–19–
CIRCUIT DESCRIPTION
The AD7707 is a sigma-delta A/D converter with on-chip digital
filtering, intended for the measurement of wide dynamic range,
low frequency signals such as those in industrial control or pro-
cess control applications. It contains a sigma-delta (or charge-
balancing) ADC, a calibration microcontroller with on-chip
static RAM, a clock oscillator, a digital filter and a bidirectional
serial communications port. The part consumes only 320
μ
A of
power supply current, making it ideal for battery-powered or
loop-powered instruments. On-chip thin-film resistors allow
±
10 V,
±
5 V, 0 V to +10 V and 0 V to +5 V high level input
signals to be directly accommodated on the analog input without
requiring split supplies, dc-dc converters or charge pumps. This
part operates with a supply voltage of 2.7 V to 3.3 V or 4.75 V
to 5.25 V.
The AD7707 contains two low level (AIN1 and AIN2) program-
mable-gain pseudo-differential analog input channels and one
high level (AIN3) single-ended input channel. For the low level
input channels the selectable gains are 1, 2, 4, 8, 16, 32, 64 and
128 allowing the part to accept unipolar signals of between
0 mV to +20 mV and 0 V to +2.5 V, or bipolar signals in the
range from
±
20 mV to
±
2.5 V when the reference input voltage
equals +2.5 V. With a reference voltage of +1.225 V, the input
ranges are from 0 mV to +10 mV to 0 V to +1.225 V in unipolar
mode, and from
±
10 mV to
±
1.225 V in bipolar mode. Note
that the signals are with respect to the LOCOM input.
The high level input channel can directly accept input signals of
±
10 V with respect to HICOM when operating with 5V sup-
plies and a reference of 2.5 V. With 3 V supplies
±
5 V can be
accommodated on the AIN3 input.
The input signal to the analog input is continuously sampled at a
rate determined by the frequency of the master clock, MCLKIN,
and the selected gain. A charge-balancing A/D converter
(Sigma-Delta Modulator) converts the sampled signal into a
digital pulse train whose duty cycle contains the digital informa-
tion. The programmable gain function on the analog input is
also incorporated in this sigma-delta modulator with the input
sampling frequency being modified to give the higher gains. A
sinc
3
digital low-pass filter processes the output of the sigma-
delta modulator and updates the output register at a rate deter-
mined by the first notch frequency of this filter. The output data
can be read from the serial port randomly or periodically at any
rate up to the output register update rate. The first notch of this
digital filter (and hence its –3dB frequency) can be programmed
via the Setup Register bits FS0 and FS1. With a master clock
frequency of 2.4576 MHz, the programmable range for this first
notch frequency is from 10 Hz to 500 Hz, giving a program-
mable range for the –3dB frequency of 2.62 Hz to 131Hz.
With a master clock frequency of 1 MHz, the programmable
range for this first notch frequency is from 4 Hz to 200 Hz,
giving a programmable range for the –3dB frequency of 1.06Hz
to 52.4Hz.
The basic connection diagram for the AD7707 is shown in
Figure 10. An AD780 or REF192, precision +2.5 V reference,
provides the reference source for the part. On the digital side,
the part is configured for three-wire operation with
CS
tied to
DGND. A quartz crystal or ceramic resonator provide the mas-
ter clock source for the part. In most cases, it will be necessary
to connect capacitors on the crystal or resonator to ensure that it
does not oscillate at overtones of its fundamental operating
frequency. The values of capacitors will vary, depending on the
manufacturer’s specifications. A similar circuit is applicable for
operation with 3 V supplies, in this case a 1.225 V reference
(AD1580) should be used for specified performance.
AV
DD
ANALOG
+5V SUPPLY
10
m
F
AIN1
AIN2
LOCOM
VBIAS
HICOM
LOW LEVEL
ANALOG
INPUT
HIGH LEVEL
ANALOG
INPUT
AGND
REF IN(+)
REF IN(–)
10
m
F
V
IN
ANALOG +5V
SUPPLY
AD780/
REF192
V
OUT
GND
AD7707
DRDY
DATA READY
DOUT
RECEIVE (READ)
DIN
SERIAL DATA
SCLK
SERIAL CLOCK
RESET
+5V
CS
MCLK IN
MCLK OUT
CRYSTAL OR
CERAMIC
RESONATOR
0.1
m
F
0.1
m
F
DGND
AIN3
DV
DD
0.1
m
F
Figure 10. Basic Connection Diagram for 5 V Operation