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參數(shù)資料
| 型號(hào)： | AD7683BCPZRL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 6/16頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 16BIT 100KSPS 8LFCSP |
| 標(biāo)準(zhǔn)包裝： | 5,000 |
| 系列： | PulSAR® |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 100k |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 6mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-WDFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 8-LFCSP-WD |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個(gè)偽差分，單極 |
AD7683
Rev. A | Page 14 of 16
VOLTAGE REFERENCE INPUT
The AD7683 voltage reference input, REF, has a dynamic input
impedance. Therefore, it should be driven by a low impedance
source with efficient decoupling between the REF and GND
pins, as explained in the Layout section.
When REF is driven by a very low impedance source (such as
an unbuffered reference voltage like the low temperature drift
the AD8605), a 10 μF (X5R, 0805 size) ceramic chip capacitor is
appropriate for optimum performance.
If desired, smaller reference decoupling capacitors with values
as low as 2.2 μF can be used with a minimal impact on perfor-
mance, especially DNL.
POWER SUPPLY
The AD7683 powers down automatically at the end of each
conversion phase and, therefore, the power scales linearly with
the sampling rate, as shown in Figure 24. This makes the part
ideal for low sampling rates (even of a few Hz) and low battery-
powered applications.
1000
100
10
0.1
1
0.01
10
100
1k
10k
100k
04
30
1-
0
24
SAMPLING RATE (SPS)
O
P
E
RA
T
ING
C
URRE
NT
(
A)
VDD = 2.7V
VDD = 5V
Figure 24. Operating Current vs. Sampling Rate
DIGITAL INTERFACE
The AD7683 is compatible with SPI, QSPI, digital hosts,
MICROWIRE, and DSPs (for example, Blackfin ADSP-BF53x
or ADSP-219x). The connection diagram is shown in Figure 25
and the corresponding timing is given in Figure 2.
A falling edge on CS initiates a conversion and the data transfer.
After the fifth DCLOCK falling edge, DOUT is enabled and forced
low. The data bits are then clocked, MSB first, by subsequent
DCLOCK falling edges. The data is valid on both DCLOCK
edges. Although the rising edge can be used to capture the data,
a digital host also using the DCLOCK falling edge allows a
faster reading rate, provided it has an acceptable hold time.
04301-025
CS
DCLOCK
DOUT
DATA IN
CLK
CONVERT
DIGITAL HOST
AD7683
Figure 25. Connection Diagram
LAYOUT
Design the PCB that houses the AD7683 so that the analog and
digital sections are separated and confined to certain areas of
the board. The pin configuration of the AD7683, with all its
analog signals on the left side and all its digital signals on the
right side, eases this task.
Avoid running digital lines under the device because these
couple noise onto the die, unless a ground plane under the
AD7683 is used as a shield. Fast switching signals, such as CS
or clocks, should never run near analog signal paths. Avoid
crossover of digital and analog signals.
Use at least one ground plane. It can be common or split between
the digital and analog sections. In such a case, it should be joined
underneath the AD7683.
The AD7683 voltage reference input (REF) has a dynamic input
impedance and should be decoupled with minimal parasitic
inductances. Accomplish this by placing the reference decoupling
ceramic capacitor close to, and ideally right up against, the REF
and GND pins and by connecting these pins with wide, low
impedance traces.
Finally, decouple the power supply, VDD, of the AD7683 with a
ceramic capacitor, typically 100 nF, placed close to the AD7683.
Connect it using short and large traces to provide low impedance
paths and reduce the effect of glitches on the power supply lines.
EVALUATING THE AD7683 PERFORMANCE
Other recommended layouts for the AD7683 are outlined in the
evaluation board for the AD7683 (EVAL-AD7683CBZ). The
evaluation board package includes a fully assembled and tested
evaluation board, documentation, and software for controlling
the board from a PC via the EVAL-CONTROL BRD3Z.
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| AD7683BCPZRL7 | 功能描述:IC ADC 16BIT 100KSPS 8LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個(gè)單端，單極 |
| AD7683BRM | 制造商:Analog Devices 功能描述:ADC Single SAR 100ksps 16-bit Serial 8-Pin MSOP Tube 制造商:Analog Devices 功能描述:IC 16-BIT ADC |
| AD7683BRMRL7 | 制造商:Analog Devices 功能描述:ADC Single SAR 100ksps 16-bit Serial 8-Pin MSOP T/R |
| AD7683BRMZ | 功能描述:IC ADC 16BIT 100KSPS 8-MSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 標(biāo)準(zhǔn)包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個(gè)單端，單極 產(chǎn)品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| AD7683BRMZRL7 | 功能描述:IC ADC 16BIT SAR 100KSPS 8MSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個(gè)單端，單極 |
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