參數資料
| 型號： | AD7655ACPZRL |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 8/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT 4CHAN 48LFCSP |
| 標準包裝： | 2,500 |
| 系列： | PulSAR® |
| 位數： | 16 |
| 采樣率（每秒）： | 1M |
| 數據接口： | 串行，并聯 |
| 轉換器數目： | 1 |
| 功率耗散（最大）： | 135mW |
| 電壓電源： | 模擬和數字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 48-LFCSP-VQ（7x7） |
| 包裝： | 帶卷 (TR) |
| 輸入數目和類型： | 2 個差分，單極 |
| 配用： | EVAL-AD7655CBZ-ND - BOARD EVALUATION FOR AD7655 |
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AD7655
Rev. B | Page 16 of 28
TYPICAL CONNECTION DIAGRAM
Figure 17 shows a typical connection diagram for the AD7655.
Some of the circuitry shown in this diagram is optional and is
discussed in the following sections.
ANALOG INPUTS
Figure 18 shows a simplified analog input section of the
AD7655.
INA1
RA
INB2
CS
AGND
AVDD
INA2
INAN
INBN
INB1
RB
03536-018
A0
A0 = L
A0 = H
Figure 18. Simplified Analog Input
The diodes shown in Figure 18 provide ESD protection for
the inputs. Care must be taken to ensure that the analog input
signal never exceeds the absolute ratings on these inputs.
This causes the diodes to become forward biased and start
conducting current. These diodes can handle a forward-biased
current of 120 mA maximum. This condition can occur when
the input buffer (U1) or (U2) supplies are different from AVDD.
In such a case, an input buffer with a short-circuit current
limitation can be used to protect the part.
This analog input structure allows the sampling of the
differential signal between INx and INxN. Unlike other
converters, the INxN is sampled at the same time as the INx
input. By using differential inputs, small signals common to
both inputs are rejected.
During the acquisition phase, for ac signals, the AD7655
behaves like a one-pole RC filter consisting of the equivalent
resistance RA, RB, and C
B
S
. The resistors RA and RB
B
are typically
500 Ω and are a lumped component made up of some serial
resistors and the on resistance of the switches. The CS capacitor
is typically 32 pF and is mainly the ADC sampling capacitor.
This one-pole filter with a typical 3 dB cutoff frequency of
10 MHz reduces undesirable aliasing effects and limits the
noise coming from the inputs.
Because the input impedance of the AD7655 is very high, the
AD7655 can be driven directly by a low impedance source
without gain error. To further improve the noise filtering of the
AD7655 analog input circuit, an external, one-pole RC filter
between the amplifier output and the ADC input, as shown in
Figure 17, can be used. However, the source impedance has to
be kept low because it affects the ac performance, especially the
total harmonic distortion. The maximum source impedance
depends on the amount of total harmonic distortion (THD)
that can be tolerated. The THD degrades when the source
impedance increases.
INPUT CHANNEL MULTIPLEXER
The AD7655 allows the choice of simultaneously sampling the
inputs pairs INA1/INB1 or INA2/INB2 with the A0 multiplexer
input. When A0 is low, the input pairs INA1/INB1 are selected,
and when A0 is high, the input pairs INA2/INB2 are selected.
Note that INAx is always converted before INBx regardless of
the state of the digital interface channel selection A/B pin.
Also note that the channel selection control, A0, should not be
changed during the acquisition phase of the converter. Refer to
the Conversion Control section and Figure 21 for timing details.
DRIVER AMPLIFIER CHOICE
Although the AD7655 is easy to drive, the driver amplifier
needs to meet at least the following requirements:
The noise generated by the driver amplifier needs to be
kept as low as possible to preserve the SNR and transition
noise performance of the AD7655. The noise coming from
the driver is filtered by the AD7655 analog input circuit
one-pole, low-pass filter made by RA, RB, and C
B
S
or by an
external filter, if one is used.
The driver needs to have a THD performance suitable to
that of the AD7655.
For multichannel, multiplexed applications, the driver
amplifier and the AD7655 analog input circuit together
must be able to settle for a full-scale step of the capacitor
array at a 16-bit level (0.0015%). In the data sheet for the
driver amplifier, the settling at 0.1% or 0.01% is more
commonly specified. This could differ significantly from
the settling time at a 16-bit level and should be verified
prior to driver selection.
The AD8021 meets these requirements and, for almost all
applications, is usually appropriate. The AD8021 needs an
external compensation capacitor of 10 pF. This capacitor should
have good linearity as an NPO ceramic or mica type. The
AD8022 can be used where a dual version is needed and a gain
of +1 is used.
The AD829 is another alternative where high frequency (above
100 kHz) performance is not required. In a gain of +1, it
requires an 82 pF NPO or mica type compensation capacitor.
The AD8610 is another option where low bias current is needed
in low frequency applications.
Refer to Table 8 for some recommended op amps.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD7655AST | 制造商:Analog Devices 功能描述:ADC Single SAR 1Msps 16-bit Parallel/Serial 48-Pin LQFP 制造商:Analog Devices 功能描述:IC 16BIT ADC SMD 7655 LQFP48 |
| AD7655ASTRL | 制造商:Analog Devices 功能描述:ADC Single SAR 1Msps 16-bit Parallel/Serial 48-Pin LQFP T/R |
| AD7655ASTZ | 功能描述:IC ADC 16BIT 1MSPS QUAD 48-LQFP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:PulSAR® 標準包裝:1 系列:microPOWER™ 位數:8 采樣率（每秒）:1M 數據接口:串行，SPI? 轉換器數目:1 功率耗散（最大）:- 電壓電源:模擬和數字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應商設備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數目和類型:8 個單端，單極 產品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| AD7655ASTZ | 制造商:Analog Devices 功能描述:CONVERTER A/D ((NW)) |
| AD7655ASTZRL | 功能描述:IC ADC 16BIT 4CHAN 48LQFP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:PulSAR® 標準包裝:1,000 系列:- 位數:12 采樣率（每秒）:300k 數據接口:并聯 轉換器數目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數目和類型:1 個單端，單極；1 個單端，雙極 |
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