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參數(shù)資料
| 型號(hào)： | AD7655ACP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | Low Cost 4-Channel 1 MSPS 16-Bit ADC |
| 中文描述： | 4-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, QCC48 |
| 封裝： | 7 X 7 MM, MO-220-VKKD-2, LFCSP-48 |
| 文件頁(yè)數(shù)： | 18/20頁(yè) |
| 文件大?。?/td> | 684K |
| 代理商： | AD7655ACP |
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REV. 0
–18–
AD7655
External Discontinuous Clock Data Read after Conversion
This mode is the most recommended of the serial slave modes.
Figure 18 shows the detailed timing diagrams of this method.
After a conversion is complete, indicated by BUSY returning low,
the results of this conversion can be read while both
CS
and
RD
are low. The data from both channels are shifted out, MSB first,
with 32 clock pulses and are valid on both the rising and falling
edge of the clock.
Among the advantages of this method, the conversion performance
is not degraded because there are no voltage transients on the
digital interface during the conversion process.
Another advantage is to be able to read the data at any speed up
to 40 MHz, which accommodates both slow digital host interface
and the fastest serial reading.
Finally, in this mode only, the AD7655 provides a daisy-chain
feature using the RDC/SDIN input pin for cascading multiple
converters together. This feature is useful for reducing component
count and wiring connections when it is desired, as it is for
instance in isolated multiconverter applications.
An example of the concatenation of two devices is shown in
Figure 19. Simultaneous sampling is possible by using a common
CNVST
signal. It should be noted that the RDC/SDIN input is
latched on the opposite edge of SCLK of the one used to shift
out the data on SDOUT. Therefore, the MSB of the upstream
converter follows the LSB of the downstream converter on the
next SCLK cycle.
External Clock Data Read during Conversion
Figure 18 shows the detailed timing diagrams of this method.
During a conversion, while both
CS
and
RD
are low, the result
of the previous conversion can be read. The data is shifted out,
MSB first, with 32 clock pulses, and is valid on both rising and
falling edges of the clock. The 32 bits have to be read before the
current conversion is complete. If that is not done, RDERROR
is pulsed high and can be used to interrupt the host interface to
prevent incomplete data reading. There is no daisy-chain feature
in this mode, and RDC/SDIN input should always be tied either
high or low.
To reduce performance degradation due to digital activity, a fast
discontinuous clock is recommended to ensure that all the bits
are read during the first half of the conversion phase. It is also
possible to begin to read the data after conversion and continue
to read the last bits even after a new conversion has been initiated.
BUSY
BUSY
AD7655
#2 (UPSTREAM)
AD7655
#1 (DOWNSTREAM)
RDC/SDIN
SDOUT
CNVST
CS
SCLK
RDC/SDIN
SDOUT
CNVST
CS
SCLK
DATA
OUT
SCLK IN
CS IN
CNVST IN
BUSY
OUT
Figure 19. Two AD7655s in a Daisy-Chain Configuration
MICROPROCESSOR INTERFACING
The AD7655 is ideally suited for traditional dc measurement
applications supporting a microprocessor, and ac signal processing
applications interfacing to a digital signal processor. The AD7655
is designed to interface either with a parallel 8-bit or 16-bit wide
interface or with a general-purpose serial port or I/O ports on a
microcontroller. A variety of external buffers can be used with
the AD7655 to prevent digital noise from coupling into the ADC.
The following section illustrates the use of the AD7655 with an
SPI equipped DSP, the ADSP-219x.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD7655ACPRL | Low Cost 4-Channel 1 MSPS 16-Bit ADC |
| AD7655AST | Low Cost 4-Channel 1 MSPS 16-Bit ADC |
| AD7655ASTRL | Low Cost 4-Channel 1 MSPS 16-Bit ADC |
| AD7660 | Circular Connector; No. of Contacts:4; Series:D38999; Body Material:Metal; Connecting Termination:Crimp; Connector Shell Size:13; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:13-4 |
| AD7660AST | 16-Bit, 100 kSPS CMOS ADC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7655ACPRL | 制造商:Analog Devices 功能描述:ADC Single SAR 1Msps 16-bit Parallel/Serial 48-Pin LFCSP EP T/R |
| AD7655ACPZ | 功能描述:IC ADC 16BIT 4CH 48-LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 標(biāo)準(zhǔn)包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個(gè)單端，單極 產(chǎn)品目錄頁(yè)面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| AD7655ACPZRL | 功能描述:IC ADC 16BIT 4CHAN 48LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個(gè)單端，單極；1 個(gè)單端，雙極 |
| AD7655AST | 制造商:Analog Devices 功能描述:ADC Single SAR 1Msps 16-bit Parallel/Serial 48-Pin LQFP 制造商:Analog Devices 功能描述:IC 16BIT ADC SMD 7655 LQFP48 |
| AD7655ASTRL | 制造商:Analog Devices 功能描述:ADC Single SAR 1Msps 16-bit Parallel/Serial 48-Pin LQFP T/R |
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