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參數(shù)資料
| 型號： | AD7538KRZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 11/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 14BIT W/BUFF 24-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 產(chǎn)品變化通告： | Product Discontinuance 27/Oct/2011 |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 設(shè)置時間： | 1.5µs |
| 位數(shù)： | 14 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 1W |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SOIC W |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 1 電流，單極；1 電流，雙極 |
| 采樣率（每秒）： | 667k |
AD7538
Rev. B | Page 4 of 16
AC PERFORMANCE CHARACTERISTICS
These characteristics are included for design guidance only and are not subject to test. VDD = 11.4 V to 15.75 V, VREF = 10 V, VPIN3 = VPIN4 =
Table 2.
Parameter
TA = 25°C
TA = TMIN, TMAX
Unit
Test Conditions/Comments
Output Current Settling Time
1.5
μs max
To 0.003% of full-scale range
IOUT load= 100 Ω, CEXT = 13 pF DAC register alternately loaded
with all 1s and all 0s; typical value of settling time is 0.8 μs
Digital-to-Analog Glitch Impulse
20
nV-sec typ
Measured with VREF = 0 V. IOUT load = 100 Ω, CEXT = 13 pF; DAC
register alternately loaded with all 1s and all 0s
Multiplying Feedthrough Error
3
5
mV p-p typ
VREF = ±10 V, 10 kHz sine wave DAC
Register loaded with all 0s
Power Supply Rejection
ΔGain/ΔVDD
±0.01
±0.02
% per % max
ΔVDD = ±5%
Output Capacitance
COUT (Pin 3)
260
pF max
DAC register loaded with all 1s
COUT (Pin 3)
130
pF max
DAC register loaded with all 0s
Output Noise Voltage Density
(10 Hz to 100 kHz)
15
nV√Hz typ
Measured between RFB and IOUT
TIMING CHARACTERISTICS
VDD = 11.4 V to 15.75 V, VREF = 10 V, VPIN3 = VPIN4 = 0 V, VSS = 0 V or 300 mV. All specifications TMIN to TMAX unless otherwise noted. See
Figure 2 for a timing diagram.
Table 3.
Parameter1
Limit at
TA = +25°C
Limit at TA = 0°C to +70°C
TA = 25°C to +85°C
Limit at
TA = 55°C to +125°C
Unit
Test Conditions/Comments
t1
0
ns min
CS to WR setup time
t2
0
ns min
CS to WR hold time
t3
170
200
240
ns min
LDAC pulse width
t4
170
200
240
ns min
Write pulse width
t5
140
160
180
ns min
Data setup time
t6
20
30
ns min
Data hold time
1 Temperature range as follows: J, K Versions: 0°C to +70°C
A, B Versions: 25°C to +85°C
S, T Versions: 55°C to +125°C
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