參數(shù)資料
型號(hào): AD7520
廠商: Intersil Corporation
英文描述: 10-Bit Multiplying D/A Converters(10位乘法D/A轉(zhuǎn)換器)
中文描述: 10位乘法D / A轉(zhuǎn)換器(10位乘法的D / A轉(zhuǎn)換器)
文件頁(yè)數(shù): 6/10頁(yè)
文件大?。?/td> 271K
代理商: AD7520
6
3. To decrease V
OUT
, connect a series resistor (0 to 250
)
between the reference voltage and the V
REF
terminal.
4. To increase V
OUT
, connect a series resistor (0 to 250
)
in the I
OUT1
amplifier feedback loop.
Bipolar (Offset Binary) Operation
The circuit configuration for operating the AD7520 in the
bipolar mode is given in Figure 9. Similar circuits can be
used for AD7521. Using offset binary digital input codes
and positive and negative reference voltage values,
4-Quadrant multiplication can be realized. The “Digital Input
Code/Analog Output Value” table for bipolar mode is given
in Table 2.
A “Logic 1” input at any digital input forces the corresponding
ladder switch to steer the bit current to IOUT1 bus. A “Logic 0”
input forces the bit current to IOUT2 bus. For any code the
IOUT1 and IOUT2 bus currents are complements of one
another. The current amplifier at IOUT2 changes the polarity
of IOUT2 current and the transconductance amplifier at
IOUT1 output sums the two currents. This configuration
doubles the output range. The difference current resulting
at zero offset binary code, (MSB = “Logic 1”, all other
bits = “Logic 0”), is corrected by using an external resistor,
(10MW), from VREF to IOUT2 .
Offset Adjustment
1. Adjust V
REF
to approximately +10V.
2. Connect all digital inputs to “Logic 1”.
3. Adjust I
OUT2
amplifier offset adjust trimpot for 0V
±
1mV at
I
OUT2
amplifier output.
4. Connect MSB (Bit 1) to “Logic 1” and all other bits to
“Logic 0”.
5. Adjust I
OUT1
amplifier offset adjust trimpot for 0V
±
1mV
at V
OUT
.
Gain Adjustment
1. Connect all digital inputs to V+.
2. Monitor V
OUT
for a -V
REF
(1-2
-(N-1)
volts reading. (N = 8 for
AD7520, and N = 10 for AD7521.).
3. To increase V
OUT
, connect a series resistor of up to 250
between V
OUT
and R
FEEDBACK
.
4. To decrease V
OUT
, connect a series resister of up to 250
between the reference voltage and the V
REF
terminal.
TABLE 2. BlPOLAR (OFFSET BINARY) CODE TABLE
DIGITAL INPUT
ANALOG OUTPUT
1111111111
-V
REF
(1-2
-(N-1)
)
-V
REF
(2
-(N-1)
)
1000000001
1000000000
0
0111111111
V
REF
(2
-(N-1)
)
V
REF
(1-2
-(N-1)
)
0000000001
0000000000
V
REF
NOTES:
1. LSB = 2
-(N-1)
V
REF
.
2. N = 8 for 7520
N = 10 for 7521.
15
4
16
1
5
AD7520
13
3
2
BIT 1
(MSB)
BIT 10
(LSB)
14
+15V
V
REF
I
OUT2
6
+
V
O
-
R
FEEDBACK
6
+
-
I
OUT1
R1 10K
0.01%
R2 10K
0.01%
D
I
R3
10M
FIGURE 9. BIPOLAR OPERATION (4-QUADRANT
MULTIPLICATION)
AD7520, AD7521
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