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參數(shù)資料
| 型號： | AD7475ARMZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 11/25頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT SERIAL LP 8-MSOP |
| 標準包裝： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 1M |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉換器數(shù)目： | 1 |
| 功率耗散（最大）： | 10.5mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應商設備封裝： | 8-MSOP |
| 包裝： | 標準包裝 |
| 輸入數(shù)目和類型： | 1 個單端，單極 |
| 其它名稱： | AD7475ARMZ-REEL7DKR |
AD7475/AD7495
Rev. B | Page 18 of 24
Full power-down is entered in a way similar to partial power-
down, except the timing sequence shown in Figure 20 must be
executed twice. The conversion process must be interrupted in a
similar fashion by bringing CS high anywhere after the second
falling edge of SCLK and before the tenth falling edge of SCLK.
The device enters partial power-down at this point. To reach
full power-down, the next conversion cycle must be interrupted
in the same way, as shown in Figure 22. Once CS has been
brought high in this window of SCLKs, then the part powers
down completely.
Note that it is not necessary to complete the 16 SCLKs once CS
has been brought high to enter a power-down mode.
To exit full power-down, and power up the AD7475/AD7495
again, a dummy conversion is performed as when powering up
from partial power-down. On the falling edge of CS, the device
begins to power up and continues to power up as long as CS is
held low until after the falling edge of the tenth SCLK. The
power-up time is longer than one dummy conversion cycle
however, and this time, tPOWER-UP, must elapse before a
conversion can be initiated, as shown in Figure 23. See the
Timing Specifications section for more information.
When power supplies are first applied to the AD7475/AD7495,
the ADC may power up in either of the power-down modes
or normal mode. Because of this, it is best to allow a dummy
cycle to elapse to ensure the part is fully powered up before
attempting a valid conversion. Likewise, if the intent is to keep
the part in partial power-down mode immediately after the
supplies are applied, then two dummy cycles must be initiated.
The first dummy cycle must hold CS low until after the tenth
SCLK falling edge, as shown in Figure 19. In the second cycle,
CS must be brought high before the tenth SCLK edge, but
after the second SCLK falling edge, as shown in Figure 20.
Alternatively, if the intent is to place the part in full power-
down mode when the supplies have been applied, then three
dummy cycles must be initiated. The first dummy cycle must
hold CS low until after the tenth SCLK edge, as shown in
Figure 19; the second and third dummy cycle place the part in
Modes section.) Once supplies are applied to the AD7475,
enough time must be allowed for the external reference to
power up and charge the reference capacitor to its final value.
For the AD7495, enough time should be allowed for the
internal reference buffer to charge the reference capacitor. Then,
to place the AD7475/ AD7495 in normal mode, a dummy cycle,
1 μs, should be initiated. If the first valid conversion is then
performed directly after the dummy conversion, ensure that
adequate acquisition time has been allowed. As mentioned
earlier, when powering up from the power-down mode, the part
returns to track upon the first SCLK edge applied after the
falling edge of CS. However, when the ADC powers up initially
after supplies are applied, the track-and-hold is already in track.
This means (assuming one has the facility to monitor the ADC
supply current) if the ADC powers up in the desired mode of
operation, and a dummy cycle is not required to change mode,
then neither is a dummy cycle required to place the track-and-
hold into track. If no current monitoring facility is available, the
relevant dummy cycle(s) should be performed to ensure the
part is in the required mode.
SCLK
SDATA
INVALID DATA
VALID DATA
1
10
16
1
THE PART BEGINS
TO POWER UP
THE PART IS FULLY
POWERED UP
16
tPOWER-UP
01684-B
-022
CS
Figure 23. Exiting Full Power-Down Mode
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD7475AR-REEL | 制造商:Analog Devices 功能描述:ADC Single SAR 1Msps 12-bit Serial 8-Pin SOIC N T/R 制造商:Rochester Electronics LLC 功能描述:FAST 12-BIT LOW POWER SERIAL ADC I.C. - Tape and Reel |
| AD7475AR-REEL7 | 制造商:Analog Devices 功能描述:ADC Single SAR 1Msps 12-bit Serial 8-Pin SOIC N T/R 制造商:Rochester Electronics LLC 功能描述:FAST 12-BIT LOW POWER SERIAL ADC I.C. - Tape and Reel |
| AD7475ARZ | 功能描述:IC ADC 12BIT SERIAL LP 8SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:- 其它有關文件:TSA1204 View All Specifications 標準包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應商設備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD7475BR | 功能描述:IC ADC 12BIT SRL LP 8-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:- 標準包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個單端，單極；1 個單端，雙極 |
| AD7475BRM | 功能描述:IC ADC 12BIT SRL LP 8-MSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應商設備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
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