參數(shù)資料
型號: AD7440
英文描述: AD7450A/AD7440: Differential Input. 1MSPS. 12-Bit ADC in 8-lead SOT-23 Preliminary Data Sheet (Rev. PrF. 3/03)
中文描述: AD7450A/AD7440:差分輸入。 1MSPS。 12位ADC,采用8引腳SOT - 23的初步數(shù)據(jù)(牧師脈沖重復(fù)頻率。3 / 03)
文件頁數(shù): 14/24頁
文件大?。?/td> 914K
代理商: AD7440
REV. PrF
PRELIMINARY TECHNICAL DATA
–14–
AD7450A/AD7440
TYPICAL CONNECTION DIAGRAM
Figure 7 shows a typical connection diagram for the
AD7450A/AD7440 for both 5 V and 3 V supplies. In this
setup the GND pin is connected to the analog ground
plane of the system. The V
REF
pin is connected to either
a 2.5 V or a 2 V decoupled reference source depending on
the power supply, to set up the analog input range. The
common mode voltage has to be set up externally and is
the value that the two inputs are centered on. The conver-
sion result is output in a 16-bit word with four leading
zeros followed by the MSB of the 12-bit or 10-bit result.
The 10-bit result of the AD7440 is followed by two trail-
ing zeros. For more details on driving the differential
inputs and setting up the common mode, see the ‘Driving
Differential Inputs’ section.
CM*
CM*
* CM - COMMON MODE VOLTAGE
VIN+
VIN-
VDD
SCLK
SDATA
GND
VREF
μC/μP
SERIAL
INTERFACE
+3V/+5V
SUPPLY
2V/2.5V
VREF
0.1μF
0.1μF
10μF
AD7450A/AD7440
VREF
P-to-P
VREF
P-to-P
Figure 7. Typical Connection Diagram
THE ANALOG INPUT
The analog input of the AD7450A/AD7440 is fully differ-
ential. Differential signals have a number of benefits over
single ended signals including noise immunity based on
the device’s common mode rejection, improvements in
distortion performance, doubling of the device’s available
dynamic range and flexibility in input ranges and bias
points. Figure 8 defines the fully differential analog input
of the AD7450A/AD7440.
VIN+
AD7450A/
AD7440
VIN-
VREF
P-to-P
VREF
P-to-P
COMMON
MODE
VOLTAGE
Figure 8. Differential Input Definition
The amplitude of the differential signal is the difference
between the signals applied to the V
IN+
and V
IN-
pins (i.e.
V
IN+
- V
IN-
). V
IN+
and V
IN-
are simultaneously driven by
two signals each of amplitude V
REF
that are 180° out of
phase. The amplitude of the differential signal is therefore
-V
REF
to +V
REF
peak-to-peak (i.e. 2 x V
REF
). This is re-
gardless of the common mode (CM). The common mode
is the average of the two signals, i.e. (V
IN+
+ V
IN-
)/2 and
is therefore the voltage that the two inputs are centered on.
This results in the span of each input being CM ± V
REF
/2.
This voltage has to be set up externally and its range var-
ies with V
REF
. As the value of V
REF
increases, the
common mode range decreases. When driving the inputs
with an amplfier, the actual common mode range will be
determined by the amplifier’s output voltage swing.
Figures 9 and 10 show how the common mode range typi-
cally varies with V
REF
for both a 5 V and a 3 V power
supply. The common mode must be in this range to guar-
antee the functionality of the AD7450A/AD7440.
For ease of use, the common mode can be set up to be
equal to V
REF
, resulting in the differential signal being
±V
REF
centered on V
REF
. When a conversion takes place,
the common mode is rejected resulting in a virtually noise
free signal of amplitude -V
REF
to +V
REF
corresponding to
the digital codes of 0 to 4095 in the case of the AD7450A
and 0 to 1024 in the case of the AD7440.
Figure 9. Input Common Mode Range versus V
REF
(V
DD
= 5V and V
REF
(max) = 3.5V)
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