參數(shù)資料
型號: AD7396AR-REEL
廠商: Analog Devices Inc
文件頁數(shù): 5/12頁
文件大?。?/td> 0K
描述: IC DAC 12BIT PARALLEL 3V 24-SOIC
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1,000
設(shè)置時(shí)間: 60µs
位數(shù): 12
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 單電源
功率耗散(最大): 1mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 24-SOIC W
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 2 電壓,單極;2 電壓,雙極
采樣率(每秒): 17k
–2–
REV. 0
AD7396/AD7397–SPECIFICATIONS
Parameter
Symbol
Conditions
+3 V
10% +5 V
10% Units
STATIC PERFORMANCE
Resolution
1
N
12
Bits
Relative Accuracy
2
INL
TA = +25
°C
±1.75
LSB max
Relative Accuracy
2
INL
TA = –40°C, +85°C
±2.0
LSB max
Differential Nonlinearity
2
DNL
TA = +25
°C, Monotonic
±0.9
LSB max
Differential Nonlinearity
2
DNL
Monotonic
±1
LSB max
Zero-Scale Error
VZSE
Data = 000H, TA = +25°C, +85°C
4.0
mV max
Zero-Scale Error
VZSE
Data = 000H, TA = –40
°C
8.0
mV max
Full-Scale Voltage Error
VFSE
TA = +25
°C, +85°C, Data = FFF
H
±8
±8mV max
Full-Scale Voltage Error
VFSE
TA = –40°C, Data = FFFH
±20
mV max
Full-Scale Tempco
3
TCVFS
–45
ppm/
°C typ
REFERENCE INPUT
VREF Range
VREF
0/VDD
V min/max
Input Resistance
RREF
2.5
M
typ4
Input Capacitance
3
CREF
55pF typ
ANALOG OUTPUT
Output Current (Source)
IOUT
Data = 800H, VOUT = 5 LSB
1
mA typ
Output Current (Sink)
IOUT
Data = 800H,
V
OUT = 5 LSB
3
mA typ
Capacitive Load
3
CL
No Oscillation
100
pF typ
LOGIC INPUTS
Logic Input Low Voltage
VIL
0.5
0.8
V max
Logic Input High Voltage
VIH
VDD – 0.6
4.0
V min
Input Leakage Current
IIL
10
A max
Input Capacitance
3
CIL
10
pF max
INTERFACE TIMING
3, 5
Chip Select Write Width
tCS
45
35
ns min
DAC Select Setup
tAS
30
15
ns min
DAC Select Hold
tAH
0
ns min
Data Setup
tDS
30
15
ns min
Data Hold
tDH
20
10
ns min
Load Setup
tLS
20
ns min
Load Hold
tLH
10
ns min
Load Pulsewidth
tLDW
30
ns min
Reset Pulsewidth
tRSW
40
30
ns min
AC CHARACTERISTICS
Output Slew Rate
SR
Data = 000H to FFFH to 000H
0.05
V/
s typ
Settling Time6
tS
To
±0.1% of Full Scale
70
60
s typ
Shutdown Recovery Time
tSDR
90
80
s typ
DAC Glitch
Q
Code 7FFH to 800H to 7FFH
65
nV/s typ
Digital Feedthrough
Q
15
nV/s typ
Feedthrough
VOUT/VREF
VREF = 1.5 VDC +1 V p-p,
Data = 000H, f = 100 kHz
–63
dB typ
SUPPLY CHARACTERISTICS
Power Supply Range
VDD RANGE
DNL <
±1 LSB
2.7/5.5
V min/max
Positive Supply Current
IDD
VIL = 0 V, No Load
125/200
A typ/max
Shutdown Supply Current
IDD_SD
SHDN = 0, V
IL = 0 V, No Load
0.1/1.5
A typ/max
Power Dissipation
PDISS
VIL = 0 V, No Load
600
1000
W max
Power Supply Sensitivity
PSS
V
DD =
±5%
0.006
%/% max
NOTES
1One LSB = V
REF/4096 V for the 12-bit AD7396.
2The first two codes (000
H, 001H) are excluded from the linearity error measurement.
3These parameters are guaranteed by design and not subject to production testing.
4Typicals represent average readings measured at +25
°C.
5All input control signals are specified with t
R = tF = 2 ns (10% to 90% of +3 V) and timed from a voltage level of +1.6 V.
6The settling time specification does not apply for negative going transitions within the last 3 LSBs of ground.
Specifications subject to change without notice.
AD7396 12-BIT
ELECTRICAL CHARACTERISTICS (@ V
REF IN = +2.5 V, –40 C < TA < +85 C, unless otherwise noted)
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