參數(shù)資料
型號: AD7328BRUZ
廠商: Analog Devices Inc
文件頁數(shù): 15/37頁
文件大小: 0K
描述: IC ADC 12BIT+ SAR 8CHAN 20TSSOP
設(shè)計資源: Using AD7328 in Appls with Single-Ended Industrial-Level Signals (CN0047)
標(biāo)準(zhǔn)包裝: 75
系列: iCMOS®
位數(shù): 12
采樣率(每秒): 1M
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 30mW
電壓電源: 雙 ±
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 管件
輸入數(shù)目和類型: 8 個單端,單極;8 個單端,雙極;4 個差分,單極;4 個差分,雙極
產(chǎn)品目錄頁面: 777 (CN2011-ZH PDF)
Data Sheet
AD7328
Rev. C | Page 21 of 36
REGISTERS
The AD7328 has four programmable registers: the control register, sequence register, Range Register 1, and Range Register 2. These
registers are write-only registers.
ADDRESSING REGISTERS
A serial transfer on the AD7328 consists of 16 SCLK cycles. The three MSBs on the DIN line during the 16 SCLK transfer are decoded to
determine which register is addressed. The three MSBs consist of the write bit, the Register Select 1 bit, and the Register Select 2 bit. The
register select bits are used to determine which of the four on-board registers is selected. The write bit determines if the data on the DIN
line following the register select bits loads into the addressed register. If the write bit is 1, the bits load into the register addressed by the
register select bits. If the write bit is 0, the data on the DIN line does not load into any register.
Combinations of the write bit, the Register Select 1 bit, and the Register Select 2 bit other than those specified in Table 8 access registers
for Analog Devices internal use only. Do not access these registers, as doing so may lead to unspecified operation of the device.
Table 8. Decoding Register Select Bits and Write Bit
Write
Register Select 1
Register Select 2
Description
0
Data on the DIN line during this serial transfer is ignored.
1
0
This combination selects the control register. The subsequent 12 bits are loaded into
the control register.
1
0
1
This combination selects Range Register 1. The subsequent 8 bits are loaded into
Range Register 1.
1
0
This combination selects Range Register 2. The subsequent 8 bits are loaded into
Range Register 2.
1
This combination selects the sequence register. The subsequent 8 bits are loaded into
the sequence register.
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