參數(shù)資料
型號(hào)： AD7264BSTZ-5-RL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 20/29頁(yè)
文件大?。?/td> 0K
描述： IC ADC 14BIT 2CH 500KSPS 48LQFP
標(biāo)準(zhǔn)包裝： 500
位數(shù)： 14
采樣率（每秒）： 500k
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 2
功率耗散（最大）： 175mW
電壓電源： 單電源
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 48-LQFP
供應(yīng)商設(shè)備封裝： 48-LQFP（7x7）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： *
AD7264
Data Sheet
Rev. B | Page 26 of 28
ADJUSTING THE OFFSET CALIBRATION REGISTER
The internal offset calibration register can be adjusted manually
to compensate for any signal path offset from the sensors to the
ADC. No internal calibration is required, and the CAL pin can
remain at a low logic state. By changing the contents of the
offset register, different amounts of offset on the analog input
signal can be compensated for. Use the following steps to
determine the digital code to be written to the offset register:
1. Configure the sensor to its offset state.
2. Perform a number of conversions using the AD7264.
3. Take the mean digital output code from both DOUTA and
DOUTB. This is a 14-bit result but the offset register is only
12 bits; thus, the 14-bit result needs to be converted to a
12-bit result that can be stored in the offset register. This is
achieved by keeping the sign bit and removing the second
and third MSBs.
4. The resultant digital code can then be written to the offset
registers to calibrate the AD7264.
Example:
Mean digital code from DOUTA = 8100 (01 1111 1010 0100)
Code written to offset register = 0111 1010 0100
If a +10 mV offset is present in the analog input signal and the
gain of the PGA is 2, the code that needs to be written to the
offset register to compensate for the offset is
)
2
μV/
305
(
mV
10
+
= 65.57 = 0000 0100 0001
If a 10 mV offset is present in the analog input signal and the
gain of the PGA is 2, the code that needs to be written to the
offset register to compensate for the offset is
)
2
μV/
305
(
mV
10
= 65.57 = 1000 0100 0001
SYSTEM GAIN CALIBRATION
The AD7264 also allows the user to write to an external gain
register, thus enabling the removal of any overall system gain
error. Both ADC A and ADC B have independent external gain
registers, allowing the user to calibrate independently the gain
on both ADC A and ADC B signal paths. The gain calibration
feature can be used to implement accurate gain matching
between ADC A and ADC B.
The system calibration function is used by setting the sensors to
which the AD7264 is connected to a 0 gain state. The AD7264
converts this analog input to a digital output code, which
corresponds to the system gain and is available on the DOUT pins,
This digital output code can then be stored in the appropriate
external register. For details on how to write to a register, see the
The gain calibration register contains seven bits of data. By
changing the contents of the gain register, different amounts of
gain on the analog input signal can be compensated for. The MSB
is a sign bit, while the remaining six bits store the multiplication
factor, which is used to adjust the analog input range. The gain
register value is effectively multiplied by the analog input to scale
the conversion result over the full range. Increasing the gain
register multiplication factor compensates for a larger analog input
range, and decreasing the gain register multiplier compensates
for a smaller analog input range. Each bit in the gain calibration
register has a resolution of 2.4 × 104 V (1/4096). A maximum of
1.538% of the analog range can be calibrated for. The multiplier
factor stored in the gain register can be decoded as outlined in
The gain registers can be cleared by writing all 0s to each register,
as described in the Writing to a Register section. For accurate
gain calibration, both the positive and negative full-scale digital
output codes should be measured prior to determining the
multiplication factor that is written to the gain register.
Table 13. Decoding of Multiplication Factors for Gain Calibration
Analog Input (V)
Digital Gain
Error (LSB)
Gain Register
Code
(Sign Bit + 6 Bits)
Multiplier
Equation
(1 ± x/4096)
Multiplier
Value
Comments
V
IN max
0 LSB
0 000000
1 0/4096
1
Sign bit = 0; negative sign in multiplier
equation
V
IN max 244 μV
2 LSB
0 000001
1 1/4096
0.999755859
Sign bit = 0; negative sign in multiplier
equation
V
IN max (63 × 244 μV)
126 LSB
0 111111
1 63/4096
0.98461914
Sign bit = 0; negative sign in multiplier
equation
V
IN max
0 LSB
1 000000
1 + 0/4096
1
Sign bit = 1; plus sign in multiplier
equation
V
IN max + 244 μV
+2 LSB
1 000001
1 + 1/4096
1.000244141
Sign bit = 1; plus sign in multiplier
equation
V
IN max + (63 × 244 μV)
+126 LSB
1 111111
1 + 63/4096
1.015380859
Sign bit = 1; plus sign in multiplier
equation
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AD7264BSTZ-RL7 功能描述:IC ADC 14BIT 2CH 1MSPS 48LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個(gè)單端，單極
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