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參數(shù)資料
| 型號： | AD7118 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | ECONOLINE: REC2.2-S_DRW(Z)/H* - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- 4.5-9V, 9-18V, 18-36V, 36-72V Wide Input Range 2 : 1- UL94V-0 Package Material- Continuous Short Circiut Protection- Cost Effective- 100% Burned In- Efficiency to 84% |
| 中文描述： | LOGDAC的CMOS對數(shù)D / A轉(zhuǎn)換 |
| 文件頁數(shù)： | 5/6頁 |
| 文件大?。?/td> | 197K |
| 代理商： | AD7118 |
AD7118
REV. A
–5–
DY NAMIC PE RFORMANCE
T he dynamic performance of the AD7118 will depend upon the
gain and phase characteristics of the output amplifier, together
with the optimum choice of PC board layout and decoupling
components. Figure 4 shows a printed circuit layout which
minimizes feedthrough from V
IN
to the output in multiplying
applications. Circuit layout is most important if the optimum
performance of the AD7118 is to be achieved. Most application
problems stem from either poor layout, grounding errors, or in-
appropriate choice of amplifier.
Figure 4. Suggested Layout for AD7118 and Op Amp
It is recommended that when using the AD7118 with a high
speed amplifier, a capacitor C1 be connected in the feedback
path as shown in Figure 1. T his capacitor, which should be
between 30 pF and 50 pF, compensates for the phase lag intro-
duced by the output capacitance of the D/A converter. Figures 5
and 6 show the performance of the AD7118 using the AD517, a
fully compensated high gain superbeta amplifier, and the
AD544, a fast FET input amplifier. T he performance without
C1 is shown in the middle trace and the response with C1 in
circuit is shown in the bottom trace.
Figure 5. Response of AD7118 with AD517L
Figure 6. Response of AD7118 with AD544S
In conventional CMOS D/A converter design parasitic
capacitance in the N-channel D/A converter switches can give
rise to glitches on the D/A converter output. T hese glitches re-
sult from digital feedthrough. T he AD7118 has been designed
to minimize these glitches as much as possible. It is recom-
mended that for minimum glitch energy the AD7118 be oper-
ated with V
DD
= 5 V. T his will reduce the available energy for
coupling across the parasitic capacitance. It should be noted
that the accuracy of the AD7118 improves as V
DD
is increased
(see Figure 8) but the device maintains monotonic behavior to
at least –66 dB in the range 5
≤
V
DD
≤
15 volts.
For operation beyond 250 kHz, capacitor C1 may be reduced in
value. T his gives an increase in bandwidth at the expense of a
poorer transient response as shown in Figures 6 and 11. In cir-
cuits where C1 is not included the high frequency roll-off point
is primarily determined by the characteristics of the output am-
plifier and not the AD7118.
Feedthrough and absolute accuracy for attenuation levels be-
yond 42 dB are sensitive to output leakage current effects. For
this reason it is recommended that the operating temperature of
the AD7118 be kept as close to 25
°
C as is practically possible,
particularly where the device’s performance at high attenuation
levels is important. A typical plot of leakage current vs. tempera-
ture is shown in Figure 10.
Some solder fluxes and cleaning materials can form slightly con-
ductive films which cause leakage effects between analog input
and output. T he user is cautioned to ensure that the manufac-
turing process for circuits using the AD7118 does not allow
such films to form. Otherwise the feedthrough, accuracy and
maximum usable range will be affected.
ST AT IC ACCURACY PE RFORMANCE
T he D/A converter section of the AD7118 consists of a 17-bit
R-2R type converter. T o obtain optimum static performance at
this level of resolution it is necessary to pay great attention to
amplifier selection, circuit grounding, etc.
Amplifier input bias current results in a dc offset at the output
of the amplifier due to the current flowing through the feedback
resistor R
FB
. It is recommended that an amplifier with an input
bias current of less than 10 nA be used (e.g., AD517 or AD544)
to minimize this offset.
Another error arises from the output amplifier’s input offset
voltage. T he amplifier is operated with a fixed feedback resis-
tance, but the equivalent source impedance (the AD7118 out-
put impedance) varies as a function of attenuation level. T his
has the effect of varying the “noise” gain of the amplifier, thus
creating a varying error due to amplifier offset voltage. T o
achieve an output offset error less than one half the smallest step
size, it is recommended that an amplifier with less than 50
μ
V of
input offset be used (such as the AD517 or AD OP07).
If dc accuracy is not critical in the application, it should be
noted that amplifiers with offset voltage up to approximately 2
millivolts can be used. Amplifiers with higher offset voltage may
cause audible “thumps” due to dc output changes.
T he AD7118 accuracy is specified and tested using only the
internal feedback resistor. It is not recommended that “gain”
trim resistors be used with the AD7118 because the internal
logic of the circuit executes a proprietary algorithm which ap-
proximates a logarithmic curve with a binary D/A converter: as a
result no single point on the attenuator transfer function can be
guaranteed to lie exactly on the theoretical curve. Any “gain-
error” (i.e., mismatch of R
FB
to the R-2R ladder) that may exist
in the AD7118 D/A converter circuit results in a constant
attenuation error over the whole range. Since the gain error of
CMOS multiplying D/A converters is normally less than 1%,
the accuracy error contribution due to “gain error” effects is
normally less than 0.09 dB.
Applications Information–
相關PDF資料 |
PDF描述 |
|---|---|
| AD7118BQ | LOGDAC CMOS Logarithmic D/A Converter |
| AD7118CQ | LOGDAC CMOS Logarithmic D/A Converter |
| AD7118KN | ECONOLINE: REC2.2-S_DR/H1 - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- UL94V-0 Package Material- Continuous Short Circiut Protection- Internal SMD design- 100% Burned In- Efficiency to 75% |
| AD7118LN | ECONOLINE: REC2.2-S_DRW(Z)/H* - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- 4.5-9V, 9-18V, 18-36V, 36-72V Wide Input Range 2 : 1- UL94V-0 Package Material- Continuous Short Circiut Protection- Cost Effective- 100% Burned In- Efficiency to 84% |
| AD7118TQ2 | LOGDAC CMOS Logarithmic D/A Converter |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD7118BQ | 制造商:AD 制造商全稱:Analog Devices 功能描述:LOGDAC CMOS Logarithmic D/A Converter |
| AD7118CQ | 制造商:AD 制造商全稱:Analog Devices 功能描述:LOGDAC CMOS Logarithmic D/A Converter |
| AD7118KN | 制造商:AD 制造商全稱:Analog Devices 功能描述:LOGDAC CMOS Logarithmic D/A Converter |
| AD7118KP | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD7118LN | 制造商:AD 制造商全稱:Analog Devices 功能描述:LOGDAC CMOS Logarithmic D/A Converter |
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