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參數(shù)資料
| 型號： | AD7013ARS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | CMOS TIA IS-54 Baseband Receive Port |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PDSO28 |
| 封裝： | SSOP-28 |
| 文件頁數(shù)： | 10/20頁 |
| 文件大?。?/td> | 591K |
| 代理商： | AD7013ARS |
–10–
REV. A
AD7013
MSB
LSB
COMMAND REGISTER ONE
MSB
LSB
Rx SAMPLING VERNIER REGISTER
V3
V2
V1
V0
CR13
CR12
CR11
CR10
CR14
CR15
CR16
CR17
CR18
CR19
RESERVED
MSB
LSB
AUX DAC1
MSB
LSB
AUX DAC2
AUX DAC3
D3
D2
D1
D0
D4
D5
D6
D7
D8
D9
D3
D2
D1
D0
D4
D5
D6
D7
Figure 7. Internal AD7013 Registers
CR10
= 0
= 1
Low ADC sample rate. The sample rate of the receive ADCs are equal to 2
×
the symbol rate or equal to MCLK/128.
High ADC sample rate. The sample rate of the ADCs are equal to 4
×
the symbol rate or equal to MCLK/64.
CR11
= 0
RRC Receive FIR filter. This selects the root-raised consine filter response for the receive sigma-delta ADCs.
This is used to match the transmit RRC filter as required by the IS-54 standard. The frequency response is shown
in Figure 16.
Analog Mode FIR filter. This selects a filter response which has a sharper roll-off than the RRC FIR filter
and the frequency response has also been scaled to operate at a master clock frequency of 5.12 MHz. This allows
the sampling rate of the receive ADCs to be a multiple of 10 kHz as required for analog cellular. The frequency
response is shown in Figure 17.
= 1
CR12
= 0
Primary ADC inputs. This selects IRx and
IRx
as the I channel inputs and QRx and
QRx
as the
Q channel inputs.
Auxiliary ADC inputs. This selects
AUX IRx
and
AUX IRx
as the I channel inputs and
AUX QRx
and
AUX QRx
as the Q channel inputs.
= 1
CR13
= 0
Auto ADC offset calibration. If auto calibration is selected, then an offset word for both ADCs is calculated
each time the receive ADCs are brought out of sleep mode. This allows ADC offsets within the AD7013 to be
automatically calibrated out.
User ADC offset calibration. When user calibration is selected, then contents of the offset registers are not updated
by the AD7013 when brought out of sleep mode. This allows the user to load the offset register externally thereby
allowing the AD7013 to also calibrate out external offsets.
= 1
CR14
= 0
Receive ADC sleep mode. This enters the I and Q ADCs into a low power sleep mode after outputting the current
IQ sample.
Receive ADC active mode. This activates the receive ADCs for normal operation.
= 1
CR15
= 0
= 1
8-Bit AUX DAC3 sleep mode. This enters the 8-bit auxiliary DAC into a low power sleep mode.
8-Bit AUX DAC3 active mode. This activates the 8-bit auxiliary DAC for normal operation.
CR16
= 0
= 1
8-Bit AUX DAC2 sleep mode. This enters the 8-bit auxiliary DAC into a low power sleep mode
8-Bit AUX DAC2 active mode. This activates the 8-bit auxiliary DAC for normal operation.
CR17
= 0
= 1
10-Bit AUX DAC1 sleep mode. This enters the 10-bit auxiliary DAC into a low power sleep mode.
10-Bit AUX DAC1 active mode. This activates the 10-bit auxiliary DAC for normal operation.
CR18
= 0
= 1
3-State Enable. This enables the 3-state buffers on the receive serial interface.
3-State Disable. This disables the 3-state buffers on the receive serial interface, entering the serial interface into
3-state.
CR19
= X
No Action.
Table II. Command Register One
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