參數(shù)資料
型號(hào)： AD7008AP20
廠商： ANALOG DEVICES INC
元件分類(lèi)： 數(shù)字信號(hào)處理外設(shè)
英文描述： M83723 14C 14#16 SKT PLUG
中文描述： 1-BIT, DSP-NUM CONTROLLED OSCILLATOR, PQCC44
封裝： PLASTIC, LCC-44
文件頁(yè)數(shù)： 10/16頁(yè)
文件大小： 505K
代理商： AD7008AP20
REV. B
–10–
AD7008
Parallel Configuration
The AD7008 functions fully in the parallel mode. There are
two parallel modes of operation. Both are similar but are tai-
lored for different bus widths, 8 and 16 bits. All modes of op-
eration can be controlled by the parallel interface.
On power up and reset, the chip must be configured by instruc-
ting the command register how to operate. The command reg-
ister may be used to set the device up for 8- or 16-bit mode,
RF
INPUT
(ANTENNA)
330
330
4.7
μF
100
nF
100
nF
MIDPOINT
BIAS
GENERATOR
OPTIONAL
BPF
OR LPF
VMID
10
10
BANDPASS
FILTER
AGC
DETECTOR
PLL
90
°
0
°
FM OUTPUT
AM OUTPUT
BIAS
CIRCUIT
PTAT
VOLTAGE
AGC VOLTAGE
PLL INPUT
RECEIVED
SIGNAL
STRENGTH
INDICATOR
R
SET
390
5
5
AD7008
FILTER
0.1μF
–16dBm
10 BITS
AD607
Figure 13. AD7008 and AD607 Receiver Circuit
sleep mode, amplitude control and synchronization logic. At
reset, the chip defaults to 8-bit bus, no amplitude control and
logic synchronized. The code fragment below indicates how
the initialization code for the AD7008 might look using the
ADSP-21020.
{dds_para is a port define to decode for
the parallel assembly register write pulse.
dds_cont is a port defined to decode for
the TC control Load pin. The Command reg-
ister must first be loaded with configura-
tion information. In this example, the chip
is set up for 16 bits data. See Table III
for details.}
r4 = 0x00010000;
{16 bits, Normal Op., AM
disabled, Synchronizer
enabled}
dm(dds_para) = r4; {write data to parallel
assembly register}
r4 = 0x00000000;
dm(dds_cont) = r5; {No data written, data is
just transferred from
parallel assembly
register to the command
register}
r4 = 0x051E0000;
{1 MHz=051EB852, load high
word first}
dm(dds_para) = r4;
r4 = 0xB8520000;
{Now load low word}
dm(dds_para)=r4;
r4 = 0x80000000; {Transfer data from the
parallel assembly
register to Freq0}
dm(dds_cont)=r4;
Local Oscillator
The AD7008 is well suited for applications such as local oscilla-
tors used in super-heterodyne receivers. Although the AD7008
can be used in a variety of receiver designs, one simple local os-
C1
0.1μF
6
4
5
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
7
9
10
11
12
13
14
15
G1
G
2A
G
2B
+5V
DMS1
DMWR
R5
390
C2
0.1μF
DMD24
DMD25
DMD26
DMD27
DMD28
DMD29
DMD30
DMD31
DMD32
DMD33
DMD34
DMD35
DMD36
DMD37
DMD38
DMD39
19
20
21
22
23
24
25
26
8
9
10
11
12
13
14
15
16
27
32
33
34
35
36
41
42
31
30
38
37
TC0
TC1
TC2
TC3
LOAD
SCLK
SDATA
FSELECT
CLK
RESET
SLEEP
CS
GND
DMD36
DMD37
DMD38
DMD39
RESET
V
CC
V
EE
7
50MHz
U2
+5V
K1115
14
OUT
V
REF
COMP
IOUT
IOUT
FSADJUST
V
AA
V
DD
V
DD
V
DD
AGND
DGND
DGND
DGND
DGND
TEST
44
7
18
29
43
40
3
17
28
39
+5V
+5V
+5V
+5V
4
5
6
+5V
+5V
R4
49.9
2
1
R3
49.9
C
B
A
DMA02
DMA01
DMA00
3
2
1
U1
74HC138
U3
AD7008
8
DMDXX–DATA BITS
DMAXX–ADDRESS BITS
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
WR
Figure 12. Parallel Interface to a 16- or 32-Bit DSP or
Microprocessor
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