參數(shù)資料
型號(hào): AD6600PCB
廠(chǎng)商: Analog Devices, Inc.
英文描述: Dual Channel, Gain-Ranging ADC with RSSI
中文描述: 雙通道,增益測(cè)距型ADC的RSSI
文件頁(yè)數(shù): 9/24頁(yè)
文件大小: 303K
代理商: AD6600PCB
REV. 0
–9–
AD6600
PIN FUNCTION DESCRIPTIONS
Pin Number
Name
Function
1, 33
2, 5, 13, 19, 21, 24, 30, 32
3
4, 14, 15, 18, 20, 25, 31
6–8
9, 10
11
12
16, 17
22
23
26
27
28
29
34
35–43
44
DVCC
GND
C1
AVCC
RSSI[2:0]
B_SEL, A_SEL
AIN
AIN
FLT
, FLT
BIN
BIN
ENC
ENC
CLK2
×
AB_OUT
D0
D1–D9
D10
Digital VCC for Digital Outputs. Can be 3.3 V.
Ground.
Internal Bias Point. Bypass by 0.01
μ
F to GND.
5 V Power Supply.
RSSI Digital Output Bits.
Mode Select Pins for Analog Input Channel A and B Sampling.
True Analog Input Channel A.
Complementary Analog Input Channel A.
Resonant Filter Pins for External LC Noise Filter.
Complementary Analog Input Channel B.
True Analog Input Channel B.
Complementary Encode Input.
True Encode Input.
2
×
Clock Output Used for Clocking Digital Filter Chips.
Digital Output Flag Indicating Whether Output Is Input A (High) or B (Low).
Digital Data Output Bit (Least Significant Bit)
*
.
Digital Data Output Bits
*
.
Digital Data Output Bit (Most Significant Bit)
*
.
*
Digital Outputs (D10:D0) in Two’s Complement Format.
PIN CONFIGURATION
3
4
5
6
7
1
2
10
11
8
9
40 39 38
41
42
43
44
36 35 34
37
29
30
31
32
33
27
28
25
26
23
24
PIN 1
TOP VIEW
(Not to Scale)
12 13 14 15 16 17 18 19 20 21 22
DVCC
GND
AVCC
GND
AB_OUT
CLK2
ENC
AD6600
ENC
AVCC
GND
BIN
G
D
D
D
D
D
D
D
D
D
D
D
A
G
B
F
A
G
A
A
F
A
DVCC
GND
C1
AVCC
GND
RSSI2
RSSI1
RSSI0
B_SEL
A_SEL
AIN
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