參數(shù)資料
型號(hào): AD648KR
廠商: ANALOG DEVICES INC
元件分類: 運(yùn)動(dòng)控制電子
英文描述: Dual Precision, Low Power BiFET Op Amp
中文描述: DUAL OP-AMP, 1500 uV OFFSET-MAX, 1 MHz BAND WIDTH, PDSO8
封裝: PLASTIC, SOIC-8
文件頁數(shù): 8/12頁
文件大?。?/td> 335K
代理商: AD648KR
AD648
REV. C
–8–
TEMP
8
C
R
SH
(M
V
)
V
OS
(
m
V)
I
B
(pA)
(1 + R
F
/R
SH
) V
OS
I
B
R
F
TOTAL
–25
0
+25
+50
+75
+85
15,970
2,830
500
88.5
15.6
7.8
150
225
300
375
450
480
151
m
V
233
m
V
360
m
V
800
m
V
3.33 mV
6.63 mV
0.30
2.26
10.00
56.6
320
640
30
m
V
262
m
V
1.0 mV
5.6 mV
32 mV
64 mV
181
m
V
495
m
V
1.36 mV
6.40 mV
35.3 mV
70.6 mV
Figure 28. Photodiode Pre-Amp Errors Over Temperature
DUAL PHOT ODIODE PRE AMP
T he performance of the dual photodiode preamp shown in Fig-
ure 27 is enhanced by the AD648’s low input current, input
voltage offset, and offset voltage drift. Each photodiode sources
a current proportional to the incident light power on its surface.
R
F
converts the photodiode current to an output voltage equal
to R
F
×
I
S
.
An error budget illustrating the importance of low amplifier in-
put current, voltage offset, and offset voltage drift to minimize
output voltage errors can be developed by considering the
equivalent circuit for the small (0.2 mm
2
area) photodiode
shown in
Figure 27. T he input current results in an error pro-
portional to the feedback resistance used. T he amplifier’s offset
will produce an error proportional to the preamp’s noise gain
(1+R
F
/R
SH
), where R
SH
is the photodiode shunt resistance. T he
amplifier’s input current will double with every 10
°
C rise in
temperature, and the photodiode’s shunt resistance halves with
every 10
°
C rise. T he error budget in Figure 28 assumes a room
temperature photodiode R
SH
of 500 M
, and the maximum in-
put current and input offset voltage specs of an AD648C.
T he capacitance at the amplifier’s negative input (the sum of the
photodiode’s shunt capacitance, the op amp’s differential input
capacitance, stray capacitance due to wiring, etc.) will cause a
rise in the preamp’s noise gain over frequency. T his can result in
excess noise over the bandwidth of interest. C
F
reduces the
noise gain “peaking” at the expense of signal bandwidth.
Figure 27. A Dual Photodiode Pre-Amp
T he AD648 in this configuration provides a 700 kHz small sig-
nal bandwidth and 1.8 V/
μ
s typical slew rate. T he 33 pF capaci-
tor across the feedback resistor optimizes the circuit’s response.
T he oscilloscope photos in Figures 26a and 26b show small and
large signal outputs of the circuit in Figure 24. Upper traces
show the input signal V
IN
. Lower traces are the resulting output
voltage with the DAC’s digital input set to all 1s. T he circuit
settles to
±
0.01% for a 20 V input step in 14
μ
s.
Figure 26a. Response to
±
20 V p-p Reference Square
Wave
Figure 26b. Response to
±
100 mV p-p Reference Square
Wave
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