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參數(shù)資料
| 型號： | AD648CQ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | Dual Precision, Low Power BiFET Op Amp |
| 中文描述： | DUAL OP-AMP, 500 uV OFFSET-MAX, 1 MHz BAND WIDTH, CDIP8 |
| 封裝： | CERDIP-8 |
| 文件頁數(shù)： | 6/12頁 |
| 文件大?。?/td> | 335K |
| 代理商： | AD648CQ |
AD648
REV. C
–6–
APPLICAT ION NOT E S
T he AD648 is a pair of JFET -input op amps with a guaranteed
maximum I
B
of less than 10 pA, and offset and drift laser-
trimmed to 0.3 mV and 3
μ
V/
°
C, respectively (AD648C). AC
specs include 1 MHz bandwidth, 1.8 V/
μ
s typical slew rate and
8
μ
s settling time for a 20 V step to
±
0.01%—all at a supply
current less than 400
μ
A. T o capitalize on the device’s perfor-
mance, a number of error sources should be considered.
T he minimal power drain and low offset drift of the AD648 re-
duce self-heating or “warm-up” effects on input offset voltage,
making the AD648 ideal for on/off battery powered applica-
tions. T he power dissipation due to the AD648’s 400
μ
A supply
current has a negligible effect on input current, but heavy out-
put loading will raise the chip temperature. Since a JFET ’s
input current doubles for every 10
°
C rise in chip temperature,
this can be a noticeable effect.
T he amplifier is designed to be functional with power supply
voltages as low as
±
4.5 V. It will exhibit a higher input offset
voltage than at the rated supply voltage of
±
15 V, due to power
supply rejection effects. Common-mode range extends from 3 V
more positive than the negative supply to 1 V more negative
than the positive supply. Designed to cleanly drive up to 10 k
and 100 pF loads, the AD648 will drive a 2 k
load with re-
duced open-loop gain.
Figure 21 shows the recommended crosstalk test circuit. A typi-
cal value for crosstalk is –120 dB at 1 kHz.
Figure 21. Crosstalk Test Circuit
LAY OUT
T o take full advantage of the AD648’s 10 pA max input current,
parasitic leakages must be kept below an acceptable level. T he
practical limit of the resistance of epoxy or phenolic circuit
board material is between 1
×
10
12
and 3
×
10
12
. T his can
result in an additional leakage of 5 pA between an input of 0 V
and a –15 V supply line. T eflon or a similar low leakage material
(with a resistance exceeding 10
17
) should be used to isolate
high impedance input lines from adjacent lines carrying high
voltages. T he insulator should be kept clean, since contaminants
will degrade the surface resistance.
A metal guard completely surrounding the high impedance
nodes and driven by a voltage near the common-mode input
potential can also be used to reduce some parasitic leakages.
T he guarding pattern in Figure 22 will reduce parasitic leakage
due to finite board surface resistance; but it will not compensate
for a low volume resistivity board.
Figure 22. Board Layout for Guarding Inputs
INPUT PROT E CT ION
T he AD648 is guaranteed to withstand input voltages equal to
the power supply potential. Exceeding the negative supply volt-
age on either input will forward bias the substrate junction of
the chip. T he induced current may destroy the amplifier due to
excess heat.
Input protection is required in applications such as a flame de-
tector in a gas chromatograph, where a very high potential may
be applied to the input terminals during a sensor fault condi-
tion. Figures 23a and 23b show simple current limiting schemes
that can be used. R
PROT ECT
should be chosen such that the
maximum overload current is 1.0 mA (for example 100 k
for a
100 V overload).
Figure 23a. Input Protection of l-to-V Converter
Figure 23b. Voltage Follower Input Protection Method
Figure 23b shows the recommended method for protecting a
voltage follower from excessive currents due to high voltage
breakdown. T he protection resistor, R
P
, limits the input current.
A nominal value of 100 k
will limit the input current to less
than 1 mA with a 100 volt input voltage applied.
T he stray capacitance between the summing junction and
ground will produce a high frequency roll-off with a corner
frequency equal to:
f
corner
=
1
2
π
R
P
C
stray
Accordingly, a 100 k
value for R
P
with a 3 pF C
stray
will cause
a 3 dB corner frequency to occur at 531 kHz.
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相關(guān)代理商/技術(shù)參數(shù) |
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| AD648J | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual Precision, Low Power BiFET Op Amp |
| AD648JCHIPS | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual Precision, Low Power BiFET Op Amp |
| AD648JN | 制造商:Rochester Electronics LLC 功能描述:LOW POWER DUAL OP AMP IC - Bulk 制造商:Analog Devices 功能描述:IC OP AMP DUAL BIFET DIP8 648 |
| AD648JNZ | 功能描述:IC OPAMP BIFET 1MHZ DUAL LP 8DIP RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 產(chǎn)品培訓(xùn)模塊:Differential Circuit Design Techniques for Communication Applications 標(biāo)準(zhǔn)包裝:1 系列:- 放大器類型:RF/IF 差分 電路數(shù):1 輸出類型:差分 轉(zhuǎn)換速率:9800 V/µs 增益帶寬積:- -3db帶寬:2.9GHz 電流 - 輸入偏壓:3µA 電壓 - 輸入偏移:- 電流 - 電源:40mA 電流 - 輸出 / 通道:- 電壓 - 電源，單路/雙路(±):3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VQFN 裸露焊盤，CSP 供應(yīng)商設(shè)備封裝:16-LFCSP-VQ 包裝:剪切帶 (CT) 產(chǎn)品目錄頁面:551 (CN2011-ZH PDF) 其它名稱:ADL5561ACPZ-R7CT |
| AD648JNZKL1 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
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